PIC17C4X
Applicable Devices 42 R42 42A 43 R43 44
FIGURE 19-11: MEMORY INTERFACE WRITETIMING (NOT SUPPORTED IN PIC17LC4X DEVICES)
Q1
Q2
Q3
Q4
Q2
Q1
OSC1
ALE
OE
151
WR
150
addr out
154
data out
AD<15:0>
addr out
152
153
TABLE 19-11: MEMORY INTERFACE WRITE REQUIREMENTS (NOT SUPPORTED IN PIC17LC4X
DEVICES)
Parameter
No.
Sym
Characteristic
Min
Typ†
Max
Units Conditions
150
TadV2alL AD<15:0> (address) valid to ALE↓
0.25Tcy - 10
—
—
ns
(address setup time)
151
152
153
154
TalL2adI
ALE↓ to address out invalid
(address hold time)
0
—
—
—
—
—
ns
ns
ns
ns
TadV2wrL Data out valid to WR↓
0.25Tcy - 40
—
(data setup time)
TwrH2adI WR↑ to data out invalid
—
—
0.25TCY §
0.25TCY §
(data hold time)
TwrL
WR pulse width
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
§
This specification ensured by design.
DS30412C-page 190
1996 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
