PIC17C4X
Applicable Devices 42 R42 42A 43 R43 44
FIGURE 19-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, AND POWER-UP
TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Timeout
32
OSC
Timeout
Internal
RESET
Watchdog
Timer
RESET
31
35
Address /
Data
TABLE 19-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ†
Max Units
Conditions
30
31
TmcL
Twdt
MCLR Pulse Width (low)
100 *
5 *
—
—
ns
VDD = 5V
VDD = 5V
Watchdog Timer Time-out Period
(Prescale = 1)
12
25 *
ms
32
33
Tost
Oscillation Start-up Timer Period
Power-up Timer Period
—
1024TOSC§
96
—
ms TOSC = OSC1 period
Tpwrt
40 *
200 *
ms
ns
VDD = 5V
PIC17CR42/42A/
43/R43/44
35
TmcL2adI MCLR to System Inter-
face bus (AD15:AD0>)
invalid
—
—
—
—
100 *
120 *
PIC17LCR42/
42A/43/R43/44
ns
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
‡
§
These parameters are for design guidance only and are not tested, nor characterized.
This specification ensured by design.
DS30412C-page 186
1996 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
