PIC17C4X
SLEEP
SUBLW
Subtract WREG from Literal
[ label ] SUBLW k
0 ≤ k ≤ 255
Enter SLEEP mode
Syntax:
Syntax:
[ label ] SLEEP
None
Operands:
Operation:
Status Affected:
Encoding:
Description:
Operands:
Operation:
k – (WREG) → (WREG)
OV, C, DC, Z
00h → WDT;
0 → WDT postscaler;
1 → TO;
1011
0010
kkkk
kkkk
0 → PD
WREG is subtracted from the eight bit
literal 'k'. The result is placed in
WREG.
Status Affected:
Encoding:
TO, PD
0000
0000
0000
0011
Words:
Cycles:
1
1
The power down status bit (PD) is
cleared.The time-out status bit (TO) is
set. Watchdog Timer and its prescaler
are cleared.
Description:
Q Cycle Activity:
Q1
The processor is put into SLEEP
mode with the oscillator stopped.
Q2
Q3
Q4
Decode
Read
Execute
Write to
WREG
literal 'k'
Words:
Cycles:
1
1
SUBLW 0x02
Example 1:
Q Cycle Activity:
Q1
Before Instruction
WREG
=
1
?
Q2
Q3
Q4
C
=
Decode
Read
Execute
NOP
register
PCLATH
After Instruction
WREG
=
=
=
1
1
0
C
Z
; result is positive
SLEEP
Example:
Example 2:
Before Instruction
TO
PD
=
=
?
?
Before Instruction
WREG
C
=
=
2
?
After Instruction
TO
PD
=
=
1 †
0
After Instruction
WREG
=
=
=
0
1
1
† If WDT causes wake-up, this bit is cleared
C
Z
; result is zero
Example 3:
Before Instruction
WREG
C
=
=
3
?
After Instruction
WREG
C
Z
=
=
=
FF ; (2’s complement)
0
1
; result is negative
1996 Microchip Technology Inc.
DS30412C-page 135
MICROCHIP [ MICROCHIP ]
