PIC17C4X
RETFIE
Return from Interrupt
[ label ] RETFIE
None
RETLW
Return Literal to WREG
Syntax:
Syntax:
[ label ] RETLW k
Operands:
Operation:
Operands:
Operation:
0 ≤ k ≤ 255
TOS → (PC);
k → (WREG); TOS → (PC);
0 → GLINTD;
PCLATH is unchanged
PCLATH is unchanged.
Status Affected:
Encoding:
None
Status Affected:
Encoding:
GLINTD
1011
0110
kkkk
kkkk
0000
0000
0000
0101
WREG is loaded with the eight bit literal
'k'. The program counter is loaded from
the top of the stack (the return address).
The high address latch (PCLATH)
remains unchanged.
Description:
Return from Interrupt. Stack is POP’ed
and Top of Stack (TOS) is loaded in the
PC. Interrupts are enabled by clearing
the GLINTD bit. GLINTD is the global
interrupt disable bit (CPUSTA<4>).
Description:
Words:
Cycles:
1
2
Words:
Cycles:
1
2
Q Cycle Activity:
Q1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Q2
Q3
Q4
Decode
Read
Execute
Write to
WREG
literal 'k'
Decode
Read
register
T0STA
Execute
NOP
Forced NOP
Example:
NOP
Execute
NOP
CALL TABLE ; WREG contains table
Forced NOP
NOP
Execute
NOP
;
;
;
offset value
WREG now has
table value
RETFIE
Example:
:
After Interrupt
TABLE
ADDWF PC
; WREG = offset
; Begin table
;
PC
GLINTD
=
=
TOS
0
RETLW k0
RETLW k1
:
:
RETLW kn
; End of table
Before Instruction
WREG
=
0x07
After Instruction
WREG
=
value of k7
1996 Microchip Technology Inc.
DS30412C-page 131
MICROCHIP [ MICROCHIP ]
