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PIC17LC42-16I/JW 参数 Datasheet PDF下载

PIC17LC42-16I/JW图片预览
型号: PIC17LC42-16I/JW
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能8位CMOS EPROM / ROM微控制器 [High-Performance 8-Bit CMOS EPROM/ROM Microcontroller]
分类和应用: 微控制器可编程只读存储器电动程控只读存储器
文件页数/大小: 240 页 / 1141 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第128页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第129页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第130页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第131页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第133页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第134页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第135页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第136页  
PIC17C4X  
RETURN  
Return from Subroutine  
RLCF  
Rotate Left f through Carry  
[ label ] RLCF f,d  
0 f 255  
Syntax:  
[ label ] RETURN  
None  
Syntax:  
Operands:  
Operands:  
Operation:  
Status Affected:  
Encoding:  
Description:  
d
[0,1]  
TOS PC;  
None  
Operation:  
f<n> d<n+1>;  
f<7> C;  
C d<0>  
0000  
0000  
0000  
0010  
Return from subroutine. The stack is  
popped and the top of the stack (TOS)  
is loaded into the program counter.  
Status Affected:  
Encoding:  
C
0001  
101d  
ffff  
ffff  
The contents of register 'f' are rotated  
one bit to the left through the Carry  
Flag. If 'd' is 0 the result is placed in  
WREG. If 'd' is 1 the result is stored  
back in register 'f'.  
Description:  
Words:  
Cycles:  
1
2
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
register f  
C
Decode  
Read  
register  
PCL*  
Execute  
NOP  
Words:  
Cycles:  
1
1
Forced NOP  
NOP  
Execute  
NOP  
* Remember reading PCL causes PCLATH to be updated.  
This will be the high address of where the RETURNinstruc-  
tion is located.  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Decode  
Read  
register 'f'  
Execute  
Write to  
destination  
RETURN  
Example:  
After Interrupt  
RLCF  
REG,0  
Example:  
PC = TOS  
Before Instruction  
REG  
=
1110 0110  
C
=
0
After Instruction  
REG  
WREG  
C
=
=
=
1110 0110  
1100 1100  
1
DS30412C-page 132  
1996 Microchip Technology Inc.  
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