欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC17LC42-16I/JW 参数 Datasheet PDF下载

PIC17LC42-16I/JW图片预览
型号: PIC17LC42-16I/JW
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能8位CMOS EPROM / ROM微控制器 [High-Performance 8-Bit CMOS EPROM/ROM Microcontroller]
分类和应用: 微控制器可编程只读存储器电动程控只读存储器
文件页数/大小: 240 页 / 1141 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第123页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第124页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第125页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第126页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第128页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第129页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第130页浏览型号PIC17LC42-16I/JW的Datasheet PDF文件第131页  
PIC17C4X  
Move Literal to high nibble in  
BSR  
MOVLW  
Move Literal to WREG  
MOVLR  
Syntax:  
[ label ] MOVLW k  
0 k 255  
Syntax:  
[ label ] MOVLR k  
0 k 15  
Operands:  
Operation:  
Status Affected:  
Encoding:  
Description:  
Operands:  
Operation:  
Status Affected:  
Encoding:  
k (WREG)  
None  
k (BSR<7:4>)  
None  
1011  
0000  
kkkk  
kkkk  
1011  
101x  
kkkk  
uuuu  
The eight bit literal 'k' is loaded into  
WREG.  
The 4-bit literal 'k' is loaded into the  
most significant 4-bits of the Bank  
Select Register (BSR). Only the high  
4-bits of the Bank Select Register  
are affected. The lower half of the  
BSR is unchanged. The assembler  
will encode the “u” fields as 0.  
Description:  
Words:  
Cycles:  
1
1
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Decode  
Read  
literal 'k'  
Execute  
Write to  
WREG  
Words:  
Cycles:  
1
1
MOVLW  
0x5A  
Example:  
Q Cycle Activity:  
Q1  
After Instruction  
Q2  
Q3  
Q4  
WREG  
=
0x5A  
Decode  
Read literal  
'k:u'  
Execute  
Write  
literal 'k' to  
BSR<7:4>  
MOVLR  
5
Example:  
Before Instruction  
BSR register  
=
=
0x22  
0x52  
After Instruction  
BSR register  
Note: This instruction is not available in the  
PIC17C42 device.  
1996 Microchip Technology Inc.  
DS30412C-page 127  
 复制成功!