PIC17C4X
MOVFP
Syntax:
Move f to p
MOVLB
Move Literal to low nibble in BSR
[ label ] MOVLB k
0 ≤ k ≤ 15
[label] MOVFP f,p
Syntax:
Operands:
0 ≤ f ≤ 255
0 ≤ p ≤ 31
Operands:
Operation:
Status Affected:
Encoding:
Description:
k → (BSR<3:0>)
None
Operation:
(f) → (p)
Status Affected:
Encoding:
None
1011
1000
uuuu
kkkk
011p
pppp
ffff
ffff
The four bit literal 'k' is loaded in the
Bank Select Register (BSR). Only the
low 4-bits of the Bank Select Register
are affected. The upper half of the BSR
is unchanged. The assembler will
encode the “u” fields as '0'.
Move data from data memory location 'f'
to data memory location 'p'. Location 'f'
can be anywhere in the 256 word data
space (00h to FFh) while 'p' can be 00h
to 1Fh.
Description:
Either ’p' or 'f' can be WREG (a useful
special situation).
Words:
Cycles:
1
1
MOVFPis particularly useful for transfer-
ring a data memory location to a periph-
eral register (such as the transmit buffer
or an I/O port). Both 'f' and 'p' can be
indirectly addressed.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
Execute
Write literal
'k' to
literal 'u:k'
Words:
Cycles:
1
1
BSR<3:0>
MOVLB
0x5
Example:
Q Cycle Activity:
Q1
Before Instruction
Q2
Q3
Q4
BSR register
=
=
0x22
Decode
Read
register 'f'
Execute
Write
register 'p'
After Instruction
BSR register
0x25
MOVFP
REG1, REG2
Example:
Note: For the PIC17C42, only the low four bits of
the BSR register are physically imple-
mented. The upper nibble is read as '0'.
Before Instruction
REG1
REG2
=
=
0x33,
0x11
After Instruction
REG1
=
=
0x33,
0x33
REG2
DS30412C-page 126
1996 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
