PIC17C75X
Example 10-5 shows an instruction sequence to initial-
ize PORTE. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized. The fol-
lowing example uses the MOVLBinstruction to load the
BSR register for bank selection.
10.5
PORTE and DDRE Register
PORTE is a 4-bit bi-directional port.The corresponding
data direction register is DDRE. A '1' in DDRE config-
ures the corresponding port pin as an input. A '0' in the
DDRE register configures the corresponding port pin
as an output. Reading PORTE reads the status of the
pins, whereas writing to it will write to the port latch.
PORTE is multiplexed with the system bus. When
operating as the system bus, PORTE contains the con-
trol signals for the address/data bus (AD15:AD0).
These control signals are Address Latch Enable (ALE),
Output Enable (OE), and Write (WR). The control sig-
nals OE and WR are active low signals. The timing for
the system bus is shown in the Electrical Characteris-
tics section.
EXAMPLE 10-5: INITIALIZING PORTE
MOVLB
CLRF
1
; Select Bank 1
PORTE ; Initialize PORTE data
; latches before setting
; the data direction
; register
MOVLW
MOVWF
0x03 ; Value used to initialize
; data direction
DDRE ; Set RE<1:0> as inputs
; RE<3:2> as outputs
; RE<7:4> are always
; read as '0'
Note: Three pins of this port are configured as
the system bus when the device’s configu-
ration bits are selected to Microprocessor
or Extended Microcontroller modes. The
other pin is a general purpose I/O or
Capture4 pin. In the two other microcon-
troller modes, RE2:RE0 are general pur-
pose I/O pins.
FIGURE 10-11: BLOCK DIAGRAM OF RE2:RE0 (IN I/O PORT MODE)
Data Bus
TTL
Input
Buffer
RD_PORTE
WR_PORTE
Port
D
D
0
1
Q
Data
CK
RD_DDRE
WR_DDRE
Q
R
CK
S
EX_EN
CNTL
SYS BUS
Control
DRV_SYS
Note: I/O pins have protection diodes to VDD and Vss.
DS30264A-page 76
Preliminary
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
