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PIC16F886-I/SS 参数 Datasheet PDF下载

PIC16F886-I/SS图片预览
型号: PIC16F886-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,增强基于闪存的8位CMOS微控制器采用纳瓦技术 [28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 288 页 / 5120 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F882/883/884/886/887  
The TRISE register (Register 3-14) controls the PORTE  
pin output drivers, even when they are being used as  
analog inputs. The user should ensure the bits in the  
TRISE register are maintained set when using them as  
analog inputs. I/O pins configured as analog input always  
read ‘0’.  
3.7  
PORTE and TRISE Registers  
PORTE(1) is a 4-bit wide, bidirectional port. The  
corresponding data direction register is TRISE. Setting a  
TRISE bit (= 1) will make the corresponding PORTE pin  
an input (i.e., put the corresponding output driver in a  
High-Impedance mode). Clearing a TRISE bit (= 0) will  
make the corresponding PORTE pin an output (i.e.,  
enable the output driver and put the contents of the  
output latch on the selected pin). The exception is RE3,  
which is input only and its TRIS bit will always read as  
1’. Example 3-6 shows how to initialize PORTE.  
Note:  
The ANSEL register must be initialized to  
configure an analog channel as a digital  
input. Pins configured as analog inputs will  
read ‘0’.  
EXAMPLE 3-6:  
INITIALIZING PORTE  
Reading the PORTE register (Register 3-13) reads the  
status of the pins, whereas writing to it will write to the  
PORT latch. All write operations are read-modify-write  
operations. Therefore, a write to a port implies that the  
port pins are read, this value is modified and then written  
to the PORT data latch. RE3 reads ‘0’ when MCLRE =  
1.  
BANKSELPORTE  
;
CLRF  
PORTE  
;Init PORTE  
;
;digital I/O  
;Bank 1  
;
BANKSELANSEL  
CLRF  
BCF  
ANSEL  
STATUS,RP1  
BANKSELTRISE  
MOVLW  
MOVWF  
B‘00001100’ ;Set RE<3:2> as inputs  
TRISE  
;and set RE<1:0>  
;as outputs  
Note 1: RE<2:0> pins are available on  
PIC16F884/887 only.  
REGISTER 3-13: PORTE: PORTE REGISTER  
U-0  
U-0  
U-0  
U-0  
R-x  
R/W-x  
RE2  
R/W-x  
RE1  
R/W-x  
RE0  
RE3  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-4  
bit 3-0  
Unimplemented: Read as ‘0’  
RD<3:0>: PORTE General Purpose I/O Pin bit  
1= Port pin is > VIH  
0= Port pin is < VIL  
REGISTER 3-14: TRISE: PORTE TRI-STATE REGISTER  
U-0  
U-0  
U-0  
U-0  
R-1(1)  
R/W-1  
R/W-1  
R/W-1  
TRISE3  
TRISE2  
TRISE1  
TRISE0  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-4  
bit 3-0  
Unimplemented: Read as ‘0’  
TRISE<3:0>: PORTE Tri-State Control bit  
1= PORTE pin configured as an input (tri-stated)  
0= PORTE pin configured as an output  
Note 1: TRISE<3> always reads ‘1’.  
© 2007 Microchip Technology Inc.  
Preliminary  
DS41291D-page 59  
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