PIC16F882/883/884/886/887
3.5.1
RC0/T1OSO/T1CKI
3.5.3
RC2/P1A/CCP1
Figure 3-11 shows the diagram for this pin. This pin is
configurable to function as one of the following:
Figure 3-13 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• a Timer1 oscillator output
• a Timer1 clock input
• a general purpose I/O
• a PWM output
• a Capture input and Compare output for
Comparator C1
FIGURE 3-11:
BLOCK DIAGRAM OF RC0
FIGURE 3-13:
BLOCK DIAGRAM OF RC2
Data Bus
Timer1 Oscillator
Circuit
T1OSCEN
Data bus
CCP1CON
VDD
D
Q
Q
VDD
D
Q
WR
CK
PORTC
WR
PORTC
CK
10
Q
CCP1/P1A
I/O Pin
01
D
Q
Q
I/O Pin
D
Q
Q
WR
TRISC
CK
VSS
WR
TRISC
CK
VSS
RD
TRISC
RD
TRISC
RD
PORTC
RD
PORTC
To Enhanced CCP1
To Timer1 clock input
3.5.2
RC1/T1OSI/CCP2
Figure 3-12 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• a Timer1 oscillator input
• a Capture input and Compare/PWM output for
Comparator C2
FIGURE 3-12:
BLOCK DIAGRAM OF RC1
T1OSCEN
T1OSI
Timer1 Oscillator
Circuit
Data Bus
CCP2CON
VDD
D
Q
Q
WR
PORTC
CK
CCP2
01
01
I/O Pin
D
Q
Q
WR
TRISC
CK
VSS
T1OSCEN
RD
TRISC
RD
PORTC
To CCP2
DS41291D-page 54
Preliminary
© 2007 Microchip Technology Inc.