PIC16F882/883/884/886/887
3.4.4.5
RB4/AN11/P1D(1)
3.4.4.7
RB6/ICSPCLK
Figure 3-10 shows the diagram for this pin. This pin is
configurable to function as one of the following:
Figure 3-10 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• a general purpose I/O
• an analog input for the ADC
• In-Circuit Serial Programming clock
(1)
• a PWM output
3.4.4.8
RB7/ICSPDAT
Note 1: P1D is available on PIC16F882/883/886
Figure 3-10 shows the diagram for this pin. This pin is
configurable to function as one of the following:
only.
3.4.4.6
RB5/AN13/T1G
• a general purpose I/O
• In-Circuit Serial Programming data
Figure 3-10 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• a Timer1 gate input
FIGURE 3-10:
BLOCK DIAGRAM OF RB<7:4>
Analog(1) Input Mode
VDD
Data Bus
D
Q
Q
Weak
WR
WPUB
CK
RBPU
CCP1OUT Enable
CCP1OUT
RD
WPUB
VDD
D
Q
Q
10
1
WR
PORTB
CK
I/O Pin
0
01
D
Q
Q
WR
TRISB
VSS
CK
RD
TRISB
Analog(1)
Input Mode
RD
PORTB
D
Q
Q
Q
Q
D
ICSP™(2)
CK
WR
IOCB
EN
Q3
RD
IOCB
D
EN
RD PORTB
Interrupt-on-
Change
To Timer1 T1G(3)
To A/D Converter
To ICSPCLK (RB6) and ICSPDAT (RB7)
Available on PIC16F882/PIC16F883/PIC16F886 only.
Note 1:
ANSELH determines Analog Input mode.
Applies to RB<7:6> pins only).
Applies to RB5 pin only.
2:
3:
© 2007 Microchip Technology Inc.
Preliminary
DS41291D-page 51