PIC16F87/88
TABLE 15-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Power-on Reset,
Brown-out Reset
MCLR Reset,
WDT Reset
Wake-up via WDT or
Interrupt
Register
TXREG
0000 0000
0000 0000
xxxx xxxx
0000 00-0
1111 1111
1111 1111
1111 1111
-000 0000
00-0 ----
---- --qq
-000 0000
--00 0000
1111 1111
0000 0000
0000 0000
0000 -010
0000 0000
-111 1111
0000 0111
000- 0000
---0 1000
xxxx xxxx
0000 ----
xxxx xxxx
xxxx xxxx
--xx xxxx
---- -xxx
x--x x000
---- ----
0000 0000
0000 0000
uuuu uuuu
0000 00-0
1111 1111
1111 1111
1111 1111
-000 0000
00-0 ----
---- --uu
-000 0000
--00 0000
1111 1111
0000 0000
0000 0000
0000 -010
0000 0000
-111 1111
0000 0111
000- 0000
---0 1000
uuuu uuuu
0000 ----
uuuu uuuu
uuuu uuuu
--uu uuuu
---- -uuu
u--x u000
---- ----
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uu-u
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uu-u ----
---- --uu
-uuu uuuu
--uu uuuu
1111 1111
uuuu uuuu
uuuu uuuu
uuuu -u1u
uuuu uuuu
-111 1111
uuuu u111
uuu- uuuu
---u uuuu
uuuu uuuu
uuuu ----
uuuu uuuu
uuuu uuuu
--uu uuuu
---- -uuu
u--u uuuu
---- ----
RCREG
ADRESH
ADCON0
OPTION
TRISA
TRISB
PIE1
PIE2
PCON
OSCCON
OSCTUNE
PR2
SSPADD
SSPSTAT
TXSTA
SPBRG
ANSEL
CMCON
CVRCON
WDTCON
ADRESL
ADCON1
EEDATA
EEADR
EEDATH
EEADRH
EECON1
EECON2
Legend: u= unchanged, x= unknown, - = unimplemented bit, read as ‘0’, q= value depends on condition,
r= reserved, maintain clear
Note 1: One or more bits in INTCON, PIR1 and PR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 15-3 for RESET value for specific condition.
DS30487B-page 136
Preliminary
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
