PIC16F688
FIGURE 10-10:
SYNCHRONOUS TRANSMISSION
RX/DT
pin
bit 0
bit 1
bit 2
bit 7
bit 0
bit 1
Word 2
bit 7
Word 1
TX/CK pin
(SCKP = 0)
TX/CK pin
(SCKP = 1)
Write to
TXREG Reg
Write Word 1
Write Word 2
TXIF bit
(Interrupt Flag)
TRMT bit
‘1’
‘1’
TXEN bit
Note:
Sync Master mode, SPBRG = 0, continuous transmission of two 8-bit words.
FIGURE 10-11:
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RX/DT pin
bit 0
bit 2
bit 1
bit 6
bit 7
TX/CK pin
Write to
TXREG reg
TXIF bit
TRMT bit
TXEN bit
TABLE 10-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
BAUDCTL ABDOVF RCIDL
—
SCKP
INTE
C2IE
BRG16
RAIE
—
WUE
INTF
TXIE
TXIF
ABDEN 01-0 0-00 01-0 0-00
INTCON
PIE1
0000 000x 0000 000x
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 000x 0000 000x
0000 0000 0000 0000
0000 0000 0000 0000
GIE
EEIE
EEIF
PEIE
ADIE
ADIF
T0IE
RCIE
RCIF
T0IF
RAIF
C1IE
OSFIE
OSFIF
TMR1IE
TMR1IF
PIR1
C2IF
C1IF
RCREG
RCSTA
SPBRG
SPBRGH
TRISC
EUSART Receive Data Register
SPEN
BRG7
BRG15
—
RX9
BRG6
BRG14
—
SREN
BRG5
CREN
BRG4
ADDEN
BRG3
FERR
BRG2
OERR
BRG1
BRG9
TRISC1
RX9D
BRG0
BRG8
TRISC0
BRG13
TRISC5
BRG12
TRISC4
BRG11
TRISC3
BRG10
TRISC2
--11 1111
--11 1111
TXREG
TXSTA
Legend:
EUSART Transmit Data Register
CSRC TX9 TXEN
0000 0000 0000 0000
0000 0010 0000 0010
SYNC
SENDB
BRGH
TRMT
TX9D
x= unknown, – = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Master Transmission.
DS41203D-page 104
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
