PIC16F688
FIGURE 2-2:
PIC16F688 SPECIAL FUNCTION REGISTERS
File
File
File
File
Address
Indirect addr. (1) 00h
Address
Indirect addr. (1) 80h
Address
Indirect addr. (1) 100h
Address
Indirect addr. (1) 180h
TMR0
PCL
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
OPTION_REG 81h
TMR0
PCL
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
120h
OPTION_REG 181h
PCL
STATUS
FSR
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
PCL
STATUS
FSR
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
1A0h
STATUS
FSR
STATUS
FSR
PORTA
TRISA
PORTA
TRISA
PORTC
TRISC
PORTC
TRISC
PCLATH
INTCON
PIR1
PCLATH
INTCON
PIE1
PCLATH
INTCON
PCLATH
INTCON
TMR1L
TMR1H
PCON
OSCCON
OSCTUNE
ANSEL
T1CON
BAUDCTL
SPBRGH
SPBRG
RCREG
TXREG
WPUA
IOCA
TXSTA
RCSTA
EEDATH
EEADRH
VRCON
EEDAT
WDTCON
CMCON0
CMCON1
EEADR
EECON1
EECON2(1)
ADRESL
ADCON1
ADRESH
ADCON0
General
Purpose
Register
General
Purpose
Register
General
Purpose
Register
80 Bytes
80 Bytes
96 Bytes
EFh
F0h
FFh
16Fh
170h
17Fh
1EFh
1F0h
1FFh
accesses
Bank 0
accesses
Bank 0
accesses
Bank 0
7Fh
Bank 0
Bank 1
Bank 2
Bank 3
Unimplemented data memory locations, read as ‘0’.
Note 1: Not a physical register.
DS41203D-page 8
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
