PIC16F688
10.1 Clock Accuracy With
10.0 ENHANCED UNIVERSAL
ASYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
Asynchronous Operation
The factory calibrates the internal oscillator block out-
put (INTOSC) for 8 MHz. However, this frequency may
drift as VDD or temperature changes, and this directly
affects the asynchronous baud rate. Two methods may
be used to adjust the baud rate clock, but both require
a reference clock source of some kind.
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is the serial
I/O module available for PIC16F688 . (EUSART is also
known as a Serial Communications Interface or SCI).
The EUSART can be configured as a full-duplex
asynchronous system that can communicate with
peripheral devices, such as CRT terminals and
personal computers. It can also be configured as a
half-duplex synchronous system that can communicate
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs, etc.
The first (preferred) method uses the OSCTUNE
register to adjust the INTOSC output back to 8 MHz.
Adjusting the value in the OSCTUNE register allows for
fine resolution changes to the system clock source (see
Section 3.4 “Internal Clock Modes” for more
information).
The other method adjusts the value in the baud rate
generator. There may not be fine enough resolution
when adjusting the Baud Rate Generator to compensate
for a gradual change in the peripheral clock frequency.
The EUSART module implements additional features,
including automatic baud rate detection and
calibration, automatic wake-up on Break reception and
13-bit Break character transmit. These make it ideally
suited for use in Local Interconnect Network (LIN) bus
systems.
The USART can be configured in the following modes:
• Asynchronous (full-duplex) with:
- Auto-wake-up on Break
- Auto baud calibration
- 13-bit Break character transmission
• Synchronous – Master (half-duplex) with
selectable clock polarity
• Synchronous – Slave (half-duplex) with selectable
clock polarity
In order to configure pins RC4/C2OUT/TX/CK and
RC5/RX/DT
as
the
Universal
Synchronous
Asynchronous Receiver Transmitter:
• SPEN (RCSTA<7>) bit must be set (= 1),
• TRISC<5> bit must be set (= 1), and
• TRISC<4> bit must be set (= 1).
Note:
The USART control will automatically
reconfigure the pin from input to output as
needed.
The operation of the EUSART module is controlled
through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCTL)
These are detailed in on the following pages in
Register 10-1, Register 10-2 and Register 10-3,
respectively.
2004 Microchip Technology Inc.
Preliminary
DS41203B-page 77
MICROCHIP [ MICROCHIP ]
