PIC16F688
REGISTER 7-3:
VRCON – VOLTAGE REFERENCE CONTROL REGISTER (ADDRESS: 99h)
R/W-0
VREN
U-0
—
R/W-0
VRR
R/W-0
—
R/W-0
VR3
R/W-0
VR2
R/W-0
VR1
R/W-0
VR0
bit 7
bit 0
bit 7
VREN: CVREF Enable bit
1= CVREF circuit powered on
0= CVREF circuit powered down, no IDD drain and CVREF = VSS.
bit 6
bit 5
Unimplemented: Read as ‘0’
VRR: CVREF Range Selection bit
1= Low range
0= High range
bit 4
Unimplemented: Read as ‘0’
bit 3-0
VR<3:0>: CVREF value selection 0 ≤ VR<3:0> ≤ 15
When VRR = 1: CVREF = (VR<3:0>/24) * VDD
When VRR = 0: CVREF = VDD/4 + (VR<3:0>/32) * VDD
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘0’ = Bit is cleared
x = Bit is unknown
TABLE 7-2:
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Value on
Value on
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
POR, BOD
Resets
0Bh/8Bh
0Ch
INTCON
PIR1
GIE
EEIF
C2OUT
—
PEIE
ADIF
C1OUT
—
T0IE
RCIF
INTE
C2IF
RAIE
C1IF
CIS
T0IF
OSFIF
CM2
INTF
TXIF
CM1
RAIF
TMR1IF
CM0
0000 0000
0000 0000
0000 0000
---- --10
--11 1111
--11 1111
0000 0000
0-0- 0000
0000 0000
0000 0000
0000 0000
---- --10
--11 1111
--11 1111
0000 0000
0-0- 0000
19h
CMCON0
CMCON1
C2INV
—
C1INV
—
1Ah
—
—
T1GSS C2SYNC
85h/185h TRISA
87h/187h TRISC
—
—
TRISA5
TRISC5
RCIE
VRR
TRISA4
TRISC4
C2IE
—
TRISA3
TRISC3
C1IE
VR3
TRISA2
TRISC2
OSFIE
VR2
TRISA1
TRISC1
TXIE
TRISA0
TRISC0
TMR1IE
VR0
—
—
8Ch
99h
PIE1
EEIE
VREN
ADIE
—
VRCON
VR1
Legend: x= unknown, u= unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by the comparator or Comparator Voltage
Reference module.
2004 Microchip Technology Inc.
Preliminary
DS41203B-page 61
MICROCHIP [ MICROCHIP ]
