PIC16F688
4.0
I/O PORTS
EXAMPLE 4-1:
BCF
CLRF
MOVLW
MOVWF
BSF
CLRF
MOVLW
MOVWF
BCF
STATUS,RP0
PORTA
07h
CMCON0
STATUS,RP0
ANSEL
0Ch
TRISA
STATUS,RP0
INITIALIZING PORTA
;Bank 0
;Init PORTA
;Set RA<2:0> to
;digital I/O
;Bank 1
;digital I/O
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
;Bank 0
There are as many as twelve general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
Note:
Additional information on I/O ports may be
found in the “PICmicro
®
Mid-Range MCU
Family Reference Manual”
(DS33023).
4.1
PORTA and the TRISA Registers
4.2
Additional Pin Functions
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA. Setting
a TRISA bit (=
1)
will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in
a Hi-impedance mode). Clearing a TRISA bit (=
0)
will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
The exception is RA3, which is input only and its TRISA
bit will always read as ‘1’. Example 4-1 shows how to
initialize PORTA.
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the port
data latch. RA3 reads ‘0’ when MCLRE =
1.
The TRISA register controls the direction of the
PORTA pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISA
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
Note:
The ANSEL (91h) and CMCON0 (19h)
registers must be initialized to configure
an analog channel as a digital input. Pins
configured as analog inputs will read ‘0’.
Every PORTA pin on the PIC16F688 has an interrupt-
on-change option and a weak pull-up option. PORTA
also provides an Ultra Low-Power Wake-up option. The
next three sections describe these functions.
4.2.1
WEAK PULL-UPS
Each of the PORTA pins, except RA3, has an individu-
ally configurable internal weak pull-up. Control bits
WPUAx enable or disable each pull-up. Refer to
off when the port pin is configured as an output. The
pull-ups are disabled on a Power-on Reset by the
RAPU bit (Option<7>). A weak pull-up is automatically
enabled for RA3 when configured as MCLR and
_disabled when RA3 is an I/O. There is no software
control of the MCLR pull-up.
REGISTER 4-1:
PORTA – PORTA REGISTER (ADDRESS: 05h OR 105h)
U-0
—
bit 7
U-0
—
R/W-x
RA5
R/W-x
RA4
R/W-x
RA3
R/W-x
RA2
R/W-0
RA1
R/W-0
RA0
bit 0
bit 7-6:
bit 5-0:
Unimplemented:
Read as ‘0’
PORTA<5:0>:
PORTA I/O pins
1
= Port pin is > V
IH
0
= Port pin is < V
IL
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
2004 Microchip Technology Inc.
Preliminary
DS41203B-page 31
MICROCHIP [ MICROCHIP TECHNOLOGY ]
