PIC16F688
REGISTER 3-2:
OSCCON – OSCILLATOR CONTROL REGISTER (ADDRESS: 8Fh)
U-0
—
R/W-1
IRCF2
R/W-1
IRCF1
R/W-0
IRCF0
R-1
OSTS(1)
R-0
R-0
LTS
R/W-0
SCS
HTS
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6-4
IRCF<2:0>: Internal Oscillator Frequency Select bits
000= 31 kHz
001= 125 kHz
010= 250 kHz
011= 500 kHz
100= 1 MHz
101= 2 MHz
110= 4 MHz
111= 8 MHz
bit 3
bit 2
bit 1
bit 0
OSTS: Oscillator Start-up Time-out Status bit
1= Device is running from the external system clock defined by FOSC<2:0>
0= Device is running from the internal system clock (HFINTOSC or LFINTOSC)
HTS: HFINTOSC (High Frequency – 8 MHz to 125 kHz) Status bit
1= HFINTOSC is stable
0= HFINTOSC is not stable
LTS: LFINTOSC (Low Frequency – 31 kHz) Stable bit
1= LFINTOSC is stable
0= LFINTOSC is not stable
SCS: System Clock Select bit
1= Internal oscillator is used for system clock
0= Clock source defined by FOSC<2:0>
Note 1: Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator
mode or Fail-Safe mode is enabled.
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
TABLE 3-2:
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
Value on
all other
Resets
Value on:
POR, BOD
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Ch
8Ch
8Fh
90h
PIR1
EEIF
EEIE
—
ADIF
ADIE
RCIF
RCIE
C2IF
C2IE
C1IF
C1IE
OSFIF
OSFIE
HTS
TXIF
TMR1IF 0000 0000 0000 0000
PIE1
TXIE TMR1IE 0000 0000 0000 0000
(2)
OSCCON
OSCTUNE
CONFIG
IRCF2 IRCF1
IRCF0 OSTS
TUN4 TUN3
LTS
SCS
-110 x000 -110 x000
—
—
—
TUN2
TUN1
TUN0 ---0 0000 ---u uuuu
(1)
2007h
CPD
CP
MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0
—
—
Legend:
x= unknown, u= unchanged, — = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators.
Note 1: See Register 11-1 for operation of all Configuration Word bits.
2: See Register 3-2 for details.
DS41203B-page 30
Preliminary
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
