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PIC16F685-I/SS 参数 Datasheet PDF下载

PIC16F685-I/SS图片预览
型号: PIC16F685-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 20引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 294 页 / 5272 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F631/677/685/687/689/690  
11.4.7  
PULSE STEERING MODE  
In Single Output mode, pulse steering allows any of the  
PWM pins to be the modulated signal. Additionally, the  
same PWM signal can be simultaneously available on  
multiple pins.  
Note:  
The associated TRIS bits must be set to  
output (‘0’) to enable the pin output driver  
in order to see the PWM signal on the pin.  
While the PWM Steering mode is active, CCP1M<1:0>  
bits of the CCP1CON register select the PWM output  
polarity for the P1<D:A> pins.  
Once the Single Output mode is selected  
(CCP1M<3:2> = 11 and P1M<1:0> = 00 of the  
CCP1CON register), the user firmware can bring out  
the same PWM signal to one, two, three or four output  
pins by setting the appropriate STR<D:A> bits of the  
PSTRCON register, as shown in Figure 11-18.  
The PWM auto-shutdown operation also applies to  
PWM Steering mode as described in Section 11.4.4  
“Enhanced PWM Auto-shutdown mode”. An  
auto-shutdown event will only affect pins that have  
PWM outputs enabled.  
REGISTER 11-4: PSTRCON: PULSE STEERING CONTROL REGISTER(1)  
U-0  
U-0  
U-0  
R/W-0  
R/W-0  
STRD  
R/W-0  
STRC  
R/W-0  
STRB  
R/W-1  
STRA  
STRSYNC  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-5  
bit 4  
Unimplemented: Read as ‘0’  
STRSYNC: Steering Sync bit  
1= Output steering update occurs on next PWM period  
0= Output steering update occurs at the beginning of the instruction cycle boundary  
bit 3  
bit 2  
bit 1  
bit 0  
STRD: Steering Enable bit D  
1= P1D pin has the PWM waveform with polarity control from CCP1M<1:0>  
0= P1D pin is assigned to port pin  
STRC: Steering Enable bit C  
1= P1C pin has the PWM waveform with polarity control from CCP1M<1:0>  
0= P1C pin is assigned to port pin  
STRB: Steering Enable bit B  
1= P1B pin has the PWM waveform with polarity control from CCP1M<1:0>  
0 = P1B pin is assigned to port pin  
STRA: Steering Enable bit A  
1= P1A pin has the PWM waveform with polarity control from CCP1M<1:0>  
0= P1A pin is assigned to port pin  
Note 1: The PWM Steering mode is available only when the CCP1CON register bits CCP1M<3:2> = 11and  
P1M<1:0> = 00.  
© 2007 Microchip Technology Inc.  
DS41262D-page 145  
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