PIC16F631/677/685/687/689/690
TABLE 11-5: SUMMARY OF REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND PWM
Value on
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
Resets
CCP1CON
CM1CON0
CM2CON0
P1M1
C1ON
C2ON
P1M0
C1OUT
C2OUT
DC1B1
C1OE
C2OE
—
DC1B0
C1POL
C2POL
—
CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000
—
—
—
C1R
C2R
—
C1CH1
C2CH1
C1CH0 0000 -000 0000 -000
C2CH0 0000 -000 0000 -000
CM2CON1 MC1OUT MC2OUT
T1GSS C2SYNC 00-- --10 00-- --10
xxxx xxxx uuuu uuuu
CCPR1L
CCPR1H
ECCPAS
INTCON
PIE1
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
xxxx xxxx uuuu uuuu
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1 PSSBD0 0000 0000 0000 0000
GIE
—
PEIE
ADIE
ADIF
—
T0IE
RCIE
RCIF
—
INTE
TXIE
RABIE
SSPIE
SSPIF
STRD
PDC3
T0IF
INTF
RABIF
0000 0000 0000 0000
CCP1IE TMR2IE TMR1IE -000 0000 -000 0000
CCP1IF TMR2IF TMR1IF -000 0000 -000 0000
PIR1
—
TXIF
PSTRCON
—
STRSYNC
PDC4
STRC
PDC2
STRB
PDC1
STRA
PDC0
---0 0001 ---0 0001
0000 0000 0000 0000
0000 0000 uuuu uuuu
PWM1CON PRSEN
PDC6
PDC5
T1CON
T2CON
TMR1L
TMR1H
TMR2
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2 TRISC1 TRISC0 1111 1111 1111 1111
Legend: – = Unimplemented locations, read as ‘0’, u= unchanged, x= unknown. Shaded cells are not used by the Capture,
Compare and PWM.
DS41262D-page 148
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
