PIC12F508/509/16F505
TABLE 10-1: DC CHARACTERISTICS: PIC12F508/509/16F505 (Industrial, Extended)
Standard Operating Conditions (unless otherwise specified)
Operating temperature -40°C ≤ TA ≤ +85°C (industrial)
DC CHARACTERISTICS
-40°C ≤ TA ≤ +125°C (extended)
Operating voltage VDD range as described in DC specification
Param
No.
Sym
Characteristic
Min
Typ†
Max
Units
Conditions
VIL Input Low Voltage
I/O ports:
D030
D030A
D031
D032
D033
D033
D033
with TTL buffer
Vss
Vss
Vss
Vss
Vss
Vss
Vss
—
—
—
—
—
—
—
0.8V
V
V
V
V
V
V
V
For all 4.5 ≤ VDD ≤ 5.5V
0.15 VDD
0.15 VDD
0.15 VDD
0.15 VDD
0.3 VDD
0.3
Otherwise
with Schmitt Trigger buffer
MCLR, T0CKI
OSC1 (in EXTRC)
OSC1 (in HS)
(Note1)
(Note1)
(Note1)
OSC1 (in XT and LP)
VIH Input High Voltage
I/O ports:
—
—
—
D040
with TTL buffer
2.0
VDD
VDD
V
V
4.5 ≤ VDD ≤ 5.5V
D040A
0.25 VDD
+ 0.8 VDD
Otherwise
D041
D042
D043
D043
D043
D070
with Schmitt Trigger buffer
0.85 VDD
0.85 VDD
0.85 VDD
0.7 VDD
1.6
—
—
VDD
VDD
VDD
VDD
VDD
TBD
V
V
For entire VDD range
MCLR, T0CKI
OSC1 (in EXTRC)
—
V
(Note1)
(Note1)
OSC1 (in HS)
—
V
OSC1 (in XT and LP)
IPUR GPIO weak pull-up current(4)
—
V
TBD
250
μA
VDD = 5V, VPIN = VSS
IIL
Input Leakage Current(2), (3)
D060
D061
D061A
D063
I/O ports
—
—
—
—
—
—
—
—
± 1
± 30
± 5
μA
μA
μA
μA
Vss ≤ VPIN ≤ VDD, Pin at high-impedance
Vss ≤ VPIN ≤ VDD
GP3/RB3/MCLRI(5)
GP3/RB3/MCLRI(6)
OSC1
Vss ≤ VPIN ≤ VDD
± 5
Vss ≤ VPIN ≤ VDD, XT, HS and LP oscillator
configuration
Output Low Voltage
D080
I/O ports/CLKOUT
—
—
—
—
—
—
—
—
0.6
0.6
0.6
0.6
V
V
V
V
IOL = 8.5 mA, VDD = 4.5V, -40°C to +85°C
IOL = 7.0 mA, VDD = 4.5V, -40°C to +125°C
IOL = 1.6 mA, VDD = 4.5V, -40°C to +85°C
IOL = 1.2 mA, VDD = 4.5V, -40°C to +125°C
D080A
D083
OSC2
D083A
Output High Voltage
D090
I/O ports/CLKOUT(3)
VDD – 0.7
VDD – 0.7
VDD – 0.7
VDD – 0.7
—
—
—
—
—
—
—
—
V
V
V
V
IOH = -3.0 mA, VDD = 4.5V, -40°C to +85°C
IOH = -2.5 mA, VDD = 4.5V, -40°C to +125°C
IOH = -1.3 mA, VDD = 4.5V, -40°C to +85°C
IOH = -1.0 mA, VDD = 4.5V, -40°C to +125°C
D090A
D092
OSC2
D092A
Capacitive Loading Specs on
Output Pins
D100
OSC2 pin
—
—
—
—
15
50
pF
pF
In XT, HS and LP modes when external clock is
used to drive OSC1.
D101
All I/O pins and OSC2
Legend:
TBD = To Be Determined.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12F508/509/
16F505 be driven with external clock in RC mode.
Note 1:
2:
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating
conditions. Higher leakage current may be measured at different input voltages.
3:
4:
5:
Negative current is defined as coming out of the pin.
Does not include GP3/RB3. For GP3/RB3 see parameters D061 and D061A.
This specification applies to GP3/RB3/MCLR configured as external MCLR and GP3/RB3/MCLR configured as input with internal pull-up
enabled.
6:
This specification applies when GP3/RB3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit
is higher than the standard I/O logic.
© 2007 Microchip Technology Inc.
Preliminary
DS41236C-page 71
MICROCHIP [ MICROCHIP ]
