PIC16F7X7
10.0
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
FIGURE 10-1:
MSSP BLOCK DIAGRAM
(SPI™ MODE)
Internal
Data Bus
Read
SSPBUF Reg
RC4/SDI/
SDA
SSPSR Reg
RC5/SDO
bit 0
Shift
Clock
Write
10.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
2
C™)
- Full Master mode
- Slave mode (with general address call)
The I
2
C interface supports the following modes in
hardware:
• Master mode
• Multi-Master mode
• Slave mode
Peripheral OE
RA5/AN4/
LVDIN/SS/
C2OUT
SS Control
Enable
Edge
Select
2
Clock Select
SSPM3:SSPM0
SMP:CKE 4
TMR2 Output
2
2
Edge
Select
Prescaler T
OSC
4, 16, 64
10.2
Control Registers
RC3/
SCK/
SCL
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON and SSPCON2). The use
of these registers and their individual configuration bits
differ significantly, depending on whether the MSSP
module is operated in SPI or I
2
C mode.
Additional details are provided under the individual
sections.
(
)
Data to TX/RX in SSPSR
TRIS bit
10.3
SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four modes
of SPI are supported. To accomplish communication,
typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDI/SDA
• Serial Clock (SCK) – RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/LVDIN/SS/C2OUT
module when operating in SPI mode.
2004 Microchip Technology Inc.
DS30498C-page 93
MICROCHIP [ MICROCHIP TECHNOLOGY ]
