PIC16F7X7
REGISTER 8-1:
T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
U-0
—
bit 7
bit 7
bit 6-3
Unimplemented:
Read as ‘0’
TOUTPS3:TOUTPS0:
Timer2 Output Postscale Select bits
0000
= 1:1 Postscale
0001
= 1:2 Postscale
0010
= 1:3 Postscale
•
•
•
1111
= 1:16 Postscale
TMR2ON:
Timer2 On bit
1
= Timer2 is on
0
= Timer2 is off
T2CKPS1:T2CKPS0:
Timer2 Clock Prescale Select bits
00
= Prescaler is 1
01
= Prescaler is 4
1x
= Prescaler is 16
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
bit 0
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
bit 2
bit 1-0
TABLE 8-1:
Address
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
Bit 7
GIE
PSPIF
(1)
PSPIE
(1)
—
Bit 6
PEIE
ADIF
ADIE
Bit 5
TMR0IE
RCIF
RCIE
Bit 4
INT0IE
TXIF
TXIE
Bit 3
RBIE
SSPIF
SSPIE
Bit 2
TMR0IF
CCP1IF
CCP1IE
Bit 1
INT0IF
TMR2IF
TMR2IE
Bit 0
RBIF
Value on:
POR, BOR
Value on
all other
Resets
Name
0Bh,8Bh,
INTCON
10Bh, 18Bh
0Ch
8Ch
11h
12h
92h
Legend:
Note 1:
PIR1
PIE1
TMR2
T2CON
PR2
0000 000x 0000 000u
TMR1IF
0000 0000 0000 0000
TMR1IE
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
Timer2 Module Register
Timer2 Period Register
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
-000 0000 -000 0000
x
= unknown,
u
= unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
Bits PSPIE and PSPIF are reserved on the PIC16F737/767 devices; always maintain these bits clear.
DS30498C-page 86
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
