PIC16F7X7
REGISTER 11-2:
RCSTA: RECEIVE STATUS AND CONTROL REGISTER (ADDRESS 18h)
R/W-0
SPEN
bit 7
bit 7
SPEN:
Serial Port Enable bit
1
= Serial port enabled (configures RC7/RX/DT and RC6/TX/CK pins as serial port pins)
0
= Serial port disabled
RX9:
9-bit Receive Enable bit
1
= Selects 9-bit reception
0
= Selects 8-bit reception
SREN:
Single Receive Enable bit
Asynchronous mode:
Don’t care.
Synchronous mode – Master:
1
= Enables single receive
0
= Disables single receive
This bit is cleared after reception is complete.
Synchronous mode – Slave:
Don’t care.
CREN:
Continuous Receive Enable bit
Asynchronous mode:
1
= Enables continuous receive
0
= Disables continuous receive
Synchronous mode:
1
= Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0
= Disables continuous receive
ADDEN:
Address Detect Enable bit
Asynchronous mode 9-bit (RX9 =
1):
1
= Enables address detection, enables interrupt and load of the receive buffer when
RSR<8> is set
0
= Disables address detection, all bytes are received and ninth bit can be used as parity bit
FERR:
Framing Error bit
1
= Framing error (can be updated by reading RCREG register and receiving next valid byte)
0
= No framing error
OERR:
Overrun Error bit
1
= Overrun error (can be cleared by clearing bit CREN)
0
= No overrun error
RX9D:
9th bit of Received Data
Can be parity bit but must be calculated by user firmware.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
R/W-0
RX9
R/W-0
SREN
R/W-0
CREN
R/W-0
ADDEN
R-0
FERR
R-0
OERR
R-x
RX9D
bit 0
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
DS30498C-page 134
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
