PIC16F7X7
11.1
AUSART Baud Rate Generator
(BRG)
The BRG supports both the Asynchronous and
Synchronous modes of the AUSART. It is a dedicated
8-bit Baud Rate Generator. The SPBRG register
controls the period of a free running 8-bit timer. In
Asynchronous mode, bit BRGH (TXSTA<2>) also
controls the baud rate. In Synchronous mode, bit
BRGH is ignored. Table 11-1 shows the formula for
computation of the baud rate for different AUSART
modes which only apply in Master mode (internal
clock).
Given the desired baud rate and F
OSC
, the nearest
integer value for the SPBRG register can be calculated
using the formula in Table 11-1. From this, the error in
baud rate can be determined.
It may be advantageous to use the high baud rate
(BRGH =
1)
even for slower baud clocks. This is
because the F
OSC
/(16(X + 1)) equation can reduce the
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
11.1.1
SAMPLING
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
TABLE 11-1:
SYNC
0
1
BAUD RATE FORMULA
BRGH =
0
(Low Speed)
(Asynchronous) Baud Rate = F
OSC
/(64(X + 1))
(Synchronous) Baud Rate = F
OSC
/(4(X + 1))
BRGH =
1
(High Speed)
Baud Rate = F
OSC
/(16(X + 1))
N/A
Legend:
X = value in SPBRG (0 to 255).
TABLE 11-2:
Address
98h
18h
99h
Legend:
Name
TXSTA
RCSTA
SPBRG
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Bit 7
CSRC
SPEN
Bit 6
TX9
RX9
Bit 5
TXEN
SREN
Bit 4
SYNC
CREN
Bit 3
—
ADDEN
Bit 2
BRGH
FERR
Bit 1
TRMT
OERR
Bit 0
TX9D
RX9D
Value on:
POR, BOR
0000 -010
0000 000x
0000 0000
Value on
all other
Resets
0000 -010
0000 000x
0000 0000
Baud Rate Generator Register
x
= unknown, — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
2004 Microchip Technology Inc.
DS30498C-page 135
MICROCHIP [ MICROCHIP TECHNOLOGY ]
