PIC16F7X7
REGISTER 5-1:
TRISE REGISTER (ADDRESS 89h)
R-0
IBF
R-0
R/W-0
IBOV
R/W-0
U-0
R/W-1
R/W-1
R/W-1
(1)
OBF
PSPMODE
—
TRISE2 TRISE1 TRISE0
bit 0
bit 7
bit 7
Parallel Slave Port Status/Control bits:
IBF: Input Buffer Full Status bit
1= A word has been received and is waiting to be read by the CPU
0= No word has been received
bit 6
bit 5
OBF: Output Buffer Full Status bit
1= The output buffer still holds a previously written word
0= The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in Microprocessor mode)
1= A write occurred when a previously input word has not been read (must be cleared in
software)
0= No overflow occurred
bit 4
PSPMODE: Parallel Slave Port Mode Select bit
1= Parallel Slave Port mode
0= General Purpose I/O mode
bit 3
bit 2
Unimplemented: Read as ‘1’(1)
Note 1: RE3 is an input only. The state of the TRISE3 bit has no effect and will always read ‘1’.
PORTE Data Direction bits:
TRISE2: Direction Control bit for pin RE2/CS/AN7
1= Input
0= Output
bit 1
bit 0
TRISE1: Direction Control bit for pin RE1/WR/AN6
1= Input
0= Output
TRISE0: Direction Control bit for pin RE0/RD/AN5
1= Input
0= Output
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
2004 Microchip Technology Inc.
DS30498C-page 69