PIC16F7X7
Pin Diagrams
PDIP, SOIC, SSOP (28-pin)
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
RB7/PGD
RB6/PGC
MCLR/VPP/RE3
2
3
4
5
6
7
8
9
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RB5/AN13/CCP3
RB4/AN11
RB3/CCP2(1)/AN9
RB2/AN8
RB1/AN10
RB0/INT/AN12
VDD
RA4/T0CKI/C1OUT
RA5/AN4/LVDIN/SS/C2OUT
VSS
OSC1/CLKI/RA7
VSS
10
11
OSC2/CLKO/RA6
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2(1)
RC2/CCP1
RC7/RX/DT
RC6/TX/CK
RC5/SDO
12
13
14
RC4/SDI/SDA
RC3/SCK/SCL
QFN (28-pin)
24
27 26
25
23 22
21
28
RB3/CCP2(1)/AN9
RB2/AN8
RB1/AN10
RB0/INT/AN12
VDD
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/LVDIN/SS/C2OUT
VSS
1
2
3
4
5
6
7
20
19
18
17
16
15
PIC16F737
PIC16F767
OSC1/CLKI/RA7
OSC2/CLKO/RA6
VSS
RC7/RX/DT
9 10 11 1213 14
8
QFN (44-pin)
33
32
RC7/RX/DT
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
1
2
3
4
5
6
7
8
9
OSC2/CLKO/RA6
OSC1/CLKI/RA7
VSS
VSS
NC
VDD
RE2/CS/AN7
RE1/WR/AN6
RE0/RD/AN5
RA5/AN4/LVDIN/SS/C2OUT
RA4/T0CKI/C1OUT
31
30
29
28
27
26
25
24
23
PIC16F747
PIC16F777
VSS
VDD
VDD
RB0/INT/AN12
RB1/AN10
RB2/AN8
10
11
Note 1: Pin location of CCP2 is determined by the CCPMX bit in Configuration Word Register 1.
DS30498C-page 2
2004 Microchip Technology Inc.