PIC16F7X7
FIGURE 1-2:
PIC16F747 AND PIC16F777 BLOCK DIAGRAM
PORTA
RA0/AN0
RA1/AN1
13
8
Data Bus
Program Counter
Standard
Flash
Program
Memory
4K/8K x 14
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/LVDIN/
SS/C2OUT
OSC2/CLKO/RA6
RAM
File
Registers
8-Level Stack
(13-bit)
368 x 8
OSC1/CLKI/RA7
Program
Bus
14
RAM Addr(1)
PORTB
9
RB0/INT/AN12
RB1/AN10
Addr MUX
Instruction Register
RB2/AN8
Indirect
Addr
7
Direct Addr
RB3/CCP2(1)/AN9
RB4/AN11
8
FSR reg
RB5/AN13/CCP3
RB7/PGD:RB6/PGC
Status reg
PORTC
8
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2(1)
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
3
MUX
Power-up
Timer
Oscillator
RC5/SDO
RC6/TX/CK
RC7/RX/DT
Instruction
Decode &
Control
Start-up Timer
ALU
Power-on
Reset
8
PORTD
Timing
Generation
Watchdog
Timer
WREG
OSC1/CLKI
OSC2/CLKO
Brown-out
Reset
RD7/PSP7:RD0/PSP0
Parallel Slave Port
VDD, VSS
PORTE
RE0/RD/AN5
RE1/WR/AN6
Timer0
Timer1
Timer2
MSSP
10-bit A/D
RE2/CS/AN7
MCLR/VPP/RE3
Addressable
USART
Comparators
BOR/LVD
CCP1, 2, 3
Note 1: Pin location of CCP2 is determined by the CCPMX bit in Configuration Word Register 1.
2004 Microchip Technology Inc.
DS30498C-page 7
MICROCHIP [ MICROCHIP ]
