PIC16C745/765
12.5
A/D Operation During Sleep
12.6
Effects of a RESET
The A/D module can operate during SLEEP mode.
This requires that the A/D clock source be set to RC
(ADCS<1:0> = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the con-
version is completed, the GO/DONE bit will be
cleared, and the result loaded into the ADRES regis-
ter. If the A/D interrupt is enabled, the device will
wake-up from SLEEP. If the A/D interrupt is not
enabled, the A/D module will then be turned off,
although the ADON bit will remain set.
A device reset forces all registers to their reset state.
The A/D module is disabled and any conversion in
progress is aborted. All pins with analog functions are
configured as available inputs.
The ADRES register will contain unknown data after a
power-on reset.
12.7
Use of the CCP Trigger
An A/D conversion can be started by the “special event
trigger” of the CCP2 module. This requires that the
CCP2M<3:0> bits (CCP2CON<3:0>) be programmed as
1011 and that the A/D module is enabled (ADON bit is
set). When the trigger occurs, the GO/DONE bit will be
set, starting the A/D conversion, and the Timer1 counter
will be reset to zero. Timer1 is reset to automatically
repeat the A/D acquisition period with minimal software
overhead (moving the ADRES to the desired location).
The appropriate analog input channel must be selected
and the minimum acquisition done before the “special
event trigger” sets the GO/DONE bit (starts a conversion).
When the A/D clock source is another clock option (not
RC), a SLEEPinstruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
Note: For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS<1:0> = 11). To perform an A/D
conversion in SLEEP, ensure the SLEEP
instruction immediately follows the instruc-
tion that sets the GO/DONE bit.
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter.
TABLE 12-2: SUMMARY OF A/D REGISTERS
Value on: Value on all
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR,
BOR
other
Resets
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000u
0Bh,8Bh,
10Bh,18Bh
(1)
PIR1
PSPIF
PSPIE
ADIF
ADIE
RCIF
RCIE
TXIF
TXIE
USBIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
USBIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0Ch
8Ch
1Eh
1Fh
(1)
PIE1
ADRES
A/D Result Register
ADCON0 ADCS1 ADCS0 CHS2
CHS1
CHS0
GO/
—
ADON 0000 00-0 0000 00-0
DONE
ADCON1
—
—
—
—
—
—
—
PCFG2
PCFG1 PCFG0 ---- -000 ---- -000
9Fh
05h
85h
09h
89h
--0x 0000 --0u 0000
--11 1111 --11 1111
---- -xxx ---- -uuu
0000 -111 0000 -111
PORTA
TRISA
PORTE
TRISE
RA5
RA4
RA3
RA2
RA1
RA0
—
—
—
—
PORTA Data Direction Register
(1)
(1)
(1)
—
—
—
—
RE2
RE1
RE0
(1)
(1)
(1)
(1)
(1)
IBF
OBF
IBOV
PSP-MODE
PORTE Data Direction Bits
Legend: x= unknown, u= unchanged, -= unimplemented read as '0'. Shaded cells are not used for A/D conversion.
Note 1: These bits are reserved on the PIC6C745; always maintain these bits clear.
DS41124A-page 94
Advanced Information
1999 Microchip Technology Inc.