PIC16C745/765
12.2
Selecting the A/D Conversion Clock
The A/D conversion time per bit is defined as TAD. The
A/D conversion requires 9.5TAD per 8-bit conversion.
The source of the A/D conversion clock is software
selectable. The four possible options for TAD are:
• 2TOSC
• 8TOSC
• 32TOSC
• Dedicated Internal RC oscillator
For correct A/D conversions, the A/D conversion clock
(TAD) must be selected to ensure a minimum TAD time
of 1.6 µs.
TABLE 12-1: TAD vs. DEVICE OPERATING FREQUENCIES
AD Clock Source (TAD)
Operation ADCS1:ADCS0
Device Frequency
5 MHz 1.25 MHz
400 ns(2)
1.6 µs
20 MHz
100 ns(2)
333.33 kHz
6 µs
24 µs(3)
96 µs(3)
2 - 6 µs(1)
2TOSC
8TOSC
32TOSC
RC
00
01
10
11
400 ns(2)
1.6 µs
6.4 µs
1.6 µs
2 - 6 µs(1,4)
6.4 µs
25.6 µs(3)
2 - 6 µs(1,4)
2 - 6 µs(1,4)
Note 1: The RC source has a typical TAD time of 4 µs.
2: These values violate the minimum required TAD time.
3: For faster conversion times, the selection of another clock source is recommended.
4: For device frequencies above 1 MHz, the device must be in SLEEP for the entire conversion, or the A/D
accuracy may be out of specification.
12.3
Configuring Analog Port Pins
12.4
A/D Conversions
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their corresponding
TRIS bits set (input). If the TRIS bit is cleared (output),
the digital output level (VOH or VOL) will be converted.
Note: The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The ADRES register will
NOT be updated with the partially completed A/D con-
version sample. That is, the ADRES register will con-
tinue to contain the value of the last completed
conversion (or the last value written to the ADRES reg-
ister). After the A/D conversion is aborted, a 2TAD wait
is required before the next acquisition is started. After
this 2TAD wait, an acquisition is automatically started on
the selected channel.
The A/D operation is independent of the state of the
CHS<2:0> bits and the TRIS bits.
Note 1: When reading the port register, all pins
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an ana-
log input. Analog levels on a digitally
configured input will not affect the conver-
sion accuracy.
2: Analog levels on any pin that is defined as
a digital input, but not as an analog input,
may cause the input buffer to consume
current that is out of specification.
3: The TRISE register is not provided on the
PIC16C745.
1999 Microchip Technology Inc.
Advanced Information
DS41124A-page 93
MICROCHIP [ MICROCHIP ]
