PIC16C745/765
The maximum recommended impedance for ana-
log sources is 10 kΩ. After the analog input channel is
selected (changed), the acquisition must pass before
the conversion can be started.
12.1
A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 12-2. The
source impedance (RS) and the internal sampling
switch (RSS) impedance directly affect the time
required to charge the capacitor CHOLD. The sampling
switch (RSS) impedance varies over the device voltage
(VDD), Figure 12-2. The source impedance affects the
offset voltage at the analog input (due to pin leakage
current).
To calculate the minimum acquisition time,
Equation 12-1 may be used. This equation assumes
that 1/2 LSb error is used (512 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
To calculate the minimum acquisition time, TACQ, see
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023). In general, however, given a max
of 10kΩ and a worst case temperature of 100°C, TACQ
will be no more than 16µsec.
FIGURE 12-2: ANALOG INPUT MODEL
VDD
Sampling
Switch
VT = 0.6V
ANx
SS
RIC ≤ 1k
RSS
Rs
CHOLD
CPIN
5 pF
= DAC capacitance
= 51.2 pF
VA
I leakage
± 500 nA
VT = 0.6V
VSS
6V
5V
Legend CPIN
VT
= input capacitance
= threshold voltage
VDD 4V
3V
= leakage current at the pin due to
various junctions
I leakage
2V
= interconnect resistance
= sampling switch
RIC
5 6 7 8 9 1011
Sampling Switch
SS
CHOLD
= sample/hold capacitance (from DAC)
(kΩ)
EQUATION 12-1: ACQUISITION TIME
TACQ
=
Amplifier Settling Time +
Hold Capacitor Charging Time +
Temperature Coefficient
=
TAMP + TC + TCOFF
TAMP = 5µS
TC = - (51.2pF)(1kΩ + RSS + RS) In(1/511)
TCOFF = (Temp -25°C)(0.05µS/°C)
DS41124A-page 92
Advanced Information
1999 Microchip Technology Inc.