PIC16C745/765
5.5
PORTE and TRISE Registers
FIGURE 5-7: PORTE BLOCK DIAGRAM
VDD
Note 1: The PIC16C745 does not provide
PORTE. The PORTE and TRISE registers
are reserved. Always maintain these bits
clear.
Data
Bus
D
Q
WR
I/O pin
PORT
PORTE has three pins, RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7, which are individually configured as
inputs or outputs. These pins have Schmitt Trigger
input buffers.
CK
Data Latch
D
Q
WR
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs) and that register ADCON1 is configured for dig-
ital I/O. In this mode, the input buffers are TTL.
TRIS
Schmitt
Trigger
Input
CK
TRIS Latch
Buffer
RD TRIS
Q
D
Register 5-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
EN
EN
PORTE pins may be multiplexed with analog inputs
(PIC16C765 only). The operation of these pins is
selected by control bits in the ADCON1 register. When
selected as an analog input, these pins will read as ’0’s.
RD PORT
To A/D Converter
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
TRISE bits are used to control the parallel slave port.
Note: On a Power-on Reset, these pins are con-
figured as analog inputs.
TABLE 5-9:
PORTE(1) FUNCTIONS
Input
Type
Output
Type
Name
Function
Description
(1)
RE0
ST
TTL
AN
ST
CMOS Bi-directional I/O
(1)
RE0/RD/AN5
RE1/WR/AN6
RE2/CS/AN7
RD
AN5
RE1
WR
AN6
RE2
CS
—
—
Parallel Slave Port control input
(1)
A/D Input
(1)
CMOS Bi-directional I/O
(1)
TTL
AN
ST
—
—
Parallel Slave Port control input
(1)
A/D Input
(1)
CMOS Bi-directional I/O
(1)
TTL
AN
—
—
Parallel Slave Port data input
(1)
AN7
A/D Input
Legend:
OD = open drain, ST = Schmitt Trigger
Note 1: PIC16C765 only.
DS41124A-page 38
Advanced Information
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
