PIC16C55X(A)
TABLE 7-5:
INITIALIZATION CONDITION FOR SPECIAL REGISTERS
Program
Counter
STATUS
Register
PCON
Register
Condition
Power-on Reset
000h
000h
0001 1xxx
0001 1uuu
0001 0uuu
0000 1uuu
uuu0 0uuu
uuu1 0uuu
---- --0-
---- --u-
---- --u-
---- --u-
---- --u-
---- --u-
MCLR reset during normal operation
MCLR reset during SLEEP
WDT reset
000h
000h
WDT Wake-up
PC + 1
(1)
Interrupt Wake-up from SLEEP
PC + 1
Legend: u= unchanged, x= unknown, -= unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and global enable bit, GIE is set, the PC is loaded with the interrupt vector
(0004h) after execution of PC+1.
TABLE 7-6:
INITIALIZATION CONDITION FOR REGISTERS
• MCLR Reset during
normal operation
• MCLR Reset during
SLEEP
• Wake up from SLEEP
through interrupt
• Wake up from SLEEP
through WDT time-out
Register
W
Address
-
Power-on Reset
• WDT Reset
xxxx xxxx
-
uuuu uuuu
-
uuuu uuuu
-
INDF
TMR0
PCL
00h
01h
xxxx xxxx
0000 0000
uuuu uuuu
0000 0000
uuuu uuuu
(2)
02h
PC + 1
(3)
(3)
STATUS
03h
0001 1xxx
000q quuu
uuuq quuu
FSR
04h
05h
06h
0Ah
0Bh
xxxx xxxx
---x xxxx
xxxx xxxx
---0 0000
0000 000x
uuuu uuuu
---u uuuu
uuuu uuuu
---0 0000
0000 000x
uuuu uuuu
---u uuuu
uuuu uuuu
---u uuuu
PORTA
PORTB
PCLATH
INTCON
(1)
uuuu uuuu
OPTION
TRISA
TRISB
PCON
81h
85h
86h
8Eh
1111 1111
---1 1111
1111 1111
---- --0-
1111 1111
---1 1111
1111 1111
uuuu uuuu
---u uuuu
uuuu uuuu
---- --u-
---- --u-
Legend: u= unchanged, x= unknown, -= unimplemented bit, reads as ‘0’,q= value depends on condition.
Note 1: One or more bits in INTCON will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
3: See Table 7-5 for reset value for specific condition.
DS40143B-page 42
Preliminary
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
