PIC16F7X
To enable the serial port, SSP enable bit, SSPEN
(SSPCON<5>) must be set. To reset or reconfigure SPI
mode, clear bit SSPEN, re-initialize the SSPCON reg-
ister, and then set bit SSPEN. This configures the SDI,
SDO, SCK, and SS pins as serial port pins. For the pins
to behave as the serial port function, they must have
their data direction bits (in the TRISC register) appro-
priately programmed. That is:
FIGURE 9-1:
SSP BLOCK DIAGRAM
(SPI MODE)
Internal
Data Bus
Read
Write
SSPBUF reg
SSPSR reg
• SDI must have TRISC<4> set
• SDO must have TRISC<5> cleared
• SCK (Master mode) must have TRISC<3>
cleared
Shift
Clock
RC4/SDI/SDA
RC5/SDO
bit0
• SCK (Slave mode) must have TRISC<3> set
• SS must have TRISA<5> set and ADCON must
be configured such that RA5 is a digital I/O
Peripheral OE
.
Control
Enable
SS
Note 1: When the SPI is in Slave mode with SS pin
control enabled (SSPCON<3:0> = 0100),
the SPI module will reset if the SS pin is set
to VDD.
RA5/SS/AN4
Edge
Select
2: If the SPI is used in Slave mode with
CKE = '1', then the SS pin control must be
enabled.
2
Clock Select
SSPM3:SSPM0
4
3: When the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
‘0100’), the state of the SS pin can affect
the state read back from the TRISC<5>
bit. The Peripheral OE signal from the
SSP module into PORTC controls the
state that is read back from the
TRISC<5> bit (see Section 4.3 for infor-
mation on PORTC). If Read-Modify-Write
instructions, such as BSF are performed
on the TRISC register while the SS pin is
high, this will cause the TRISC<5> bit to
be set, thus disabling the SDO output.
TMR2 Output
2
Edge
Select
TCY
Prescaler
4, 16, 64
RC3/SCK/
SCL
TRISC<3>
DS30325B-page 62
2002 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
