PIC16C63A/65B/73B/74B
11.1
USART Baud Rate Generator
(BRG)
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
OSC
/(16(X + 1)) equation can reduce the
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In Asynchronous
mode, bit BRGH (TXSTA<2>) also controls the baud
rate. In Synchronous mode, bit BRGH is ignored.
baud rate for different USART modes, which only apply
in Master mode (internal clock).
Given the desired baud rate and Fosc, the nearest inte-
ger value for the SPBRG register can be calculated
using the formula in Table 11-1. From this, the error in
baud rate can be determined.
11.1.1
SAMPLING
The data on the RC7/RX/DT pin is sampled three times
near the center of each bit time by a majority detect cir-
cuit to determine if a high or a low level is present at the
RX pin.
TABLE 11-1:
SYNC
0
1
BAUD RATE FORMULA
BRGH = 0 (Low Speed)
(Asynchronous) Baud Rate = F
OSC
/(64(SPBRG+1))
(Synchronous) Baud Rate = F
OSC
/(4(SPBRG+1))
BRGH = 1 (High Speed)
Baud Rate = F
OSC
/(16(SPBRG+1))
N/A
TABLE 11-2:
Address
98h
18h
99h
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Bit 7
CSRC
SPEN
Bit 6
TX9
RX9
Bit 5
TXEN
SREN
Bit 4
SYNC
CREN
Bit 3
—
—
Bit 2
BRGH
FERR
Bit 1
TRMT
OERR
Bit 0
TX9D
RX9D
Value on:
POR,
BOR
0000 -010
0000 -00x
0000 0000
Name
TXSTA
RCSTA
SPBRG
Value on
all other
RESETS
0000 -010
0000 -00x
0000 0000
Baud Rate Generator register
Legend:
x
= unknown, - = unimplemented, read as '0'. Shaded cells are not used by the BRG.
2000 Microchip Technology Inc.
DS30605C-page 67
MICROCHIP [ MICROCHIP TECHNOLOGY ]
