PIC16C63A/65B/73B/74B
Steps to follow when setting up an Asynchronous
Transmission:
1.
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 11.1)
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, set interrupt enable bits
TXIE (PIE1<4>), PEIE (INTCON<6>), and GIE
(INTCON<7>), as required.
4.
5.
6.
7.
If 9-bit transmission is desired, then set transmit
bit TX9.
Enable the transmission by setting bit TXEN,
which will also set flag bit TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
Load data to the TXREG register (starts trans-
mission).
2.
3.
FIGURE 11-2:
Write to TXREG
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit buffer
reg. empty flag)
ASYNCHRONOUS MASTER TRANSMISSION
Word 1
START Bit
Bit 0
Bit 1
Word 1
Bit 7/8
STOP Bit
TRMT bit
(Transmit shift
reg. empty flag)
Word 1
Transmit Shift Reg
FIGURE 11-3:
Write to TXREG
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. flag)
ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK)
Word 1
Word 2
START Bit
Bit 0
Bit 1
Word 1
Bit 7/8
STOP Bit
START Bit
Word 2
Bit 0
TRMT bit
(Transmit shift
reg. empty flag)
Word 1
Transmit Shift Reg.
Word 2
Transmit Shift Reg.
Note:
This timing diagram shows two consecutive transmissions.
TABLE 11-3:
Address
0Bh,8Bh
0Ch
18h
19h
8Ch
98h
99h
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Bit 7
GIE
PSPIF
(1)
SPEN
PSPIE
(1)
CSRC
Bit 6
PEIE
ADIF
(2)
RX9
ADIE
(2)
TX9
Bit 5
T0IE
RCIF
SREN
RCIE
TXEN
Bit 4
INTE
TXIF
CREN
TXIE
SYNC
Bit 3
RBIE
SSPIF
—
Bit 2
T0IF
CCP1IF
FERR
Bit 1
INTF
TMR2IF
OERR
TMR2IE
TRMT
Bit 0
RBIF
RX9D
Value on:
POR,
BOR
0000 000x
0000 -00x
0000 0000
Name
INTCON
PIR1
RCSTA
TXREG
PIE1
TXSTA
Value on
all other
RESETS
0000 000u
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
TMR1IF
0000 0000
USART Transmit Register
SSPIE CCP1IE
—
BRGH
TX9D
TMR1IE
0000 0000
0000 -010
0000 0000
SPBRG Baud Rate Generator Register
Legend:
u
= unchanged,
x
= unknown, - = unimplemented locations read as '0'.
Shaded cells are not used for asynchronous transmission.
Note 1:
Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear.
2:
Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
2000 Microchip Technology Inc.
DS30605C-page 69
MICROCHIP [ MICROCHIP TECHNOLOGY ]
