PIC16C63A/65B/73B/74B
10.3.1.2
Reception
a)
When the R/W bit of the address byte is clear and an
address match occurs, the R/W bit of the SSPSTAT
register is cleared. The received address is loaded into
the SSPBUF register.
When the address byte overflow condition exists, then
no acknowledge (ACK) pulse is given. An overflow con-
dition is defined as any situation where a received byte
in SSPBUF is overwritten by the next received byte
before it has been read. An overflow has occurred
when:
The Buffer Full flag bit, BF(SSPSTAT<0>) was
set, indicating that the byte in SSPBUF was
waiting to be read when another byte was
received. This sets the SSPOV flag.
The overflow flag, SSPOV (SSPCON1<6>) was
set.
b)
An SSP interrupt is generated for each data transfer
byte. Flag bit SSPIF (PIR1<3>) must be cleared in soft-
ware. The SSPSTAT register is used to determine the
status of the byte.
FIGURE 10-6:
I
2
C WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
SDA
Receiving Address R/W=0
Receiving Data
Receiving Data
ACK
ACK
ACK
A7 A6 A5 A4 A3 A2 A1
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
S
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
P
SCL
SSPIF (PIR1<3>)
Cleared in software
Bus Master
terminates
transfer
BF (SSPSTAT<0>)
SSPBUF register is read
SSPOV (SSPCON<6>)
Bit SSPOV is set because the SSPBUF register is still full
ACK is not sent
DS30605C-page 62
2000 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
