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PIC16C65B-04/L 参数 Datasheet PDF下载

PIC16C65B-04/L图片预览
型号: PIC16C65B-04/L
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚8位CMOS微控制器 [28/40-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路PC可编程只读存储器时钟
文件页数/大小: 184 页 / 2121 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC16C63A/65B/73B/74B
8.0
TIMER2 MODULE
8.1
Timer2 Prescaler and Postscaler
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
the PWM mode of the CCP module(s). The TMR2 reg-
ister is readable and writable, and is cleared on any
device RESET.
The input clock (F
OSC
/4) has a prescale option of 1:1,
1:4,
or
1:16,
selected
by
control
bits
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut-off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Additional information on timer modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device RESET (POR, BOR, MCLR Reset, or
WDT Reset)
TMR2 is not cleared when T2CON is written.
8.2
Output of TMR2
The output of TMR2 (before the postscaler) is fed to the
SSP module, which optionally uses it to generate the
shift clock.
FIGURE 8-1:
Sets Flag
TMR2
bit TMR2IF Output
(1)
RESET
Postscaler
1:1 to 1:16
4
T2OUTPS3:
T2OUTPS0
Note
TIMER2 BLOCK DIAGRAM
TMR2 reg
Comparator
Prescaler
1:1, 1:4, 1:16
2
T2CKPS1:
T2CKPS0
F
OSC
/4
EQ
PR2 reg
1:
TMR2 register output can be software selected by the
SSP module as a baud clock.
REGISTER 8-1:
T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
U-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
bit 0
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
bit 7
bit 6-3
Unimplemented:
Read as '0'
TOUTPS3:TOUTPS0:
Timer2 Output Postscale Select bits
0000
= 1:1 Postscale
0001
= 1:2 Postscale
0010
= 1:3 Postscale
1111
= 1:16 Postscale
TMR2ON:
Timer2 On bit
1
= Timer2 is on
0
= Timer2 is off
T2CKPS1:T2CKPS0:
Timer2 Clock Prescale Select bits
00
= Prescaler is 1
01
= Prescaler is 4
1x
= Prescaler is 16
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
x = Bit is unknown
bit 2
bit 1-0
2000 Microchip Technology Inc.
DS30605C-page 47