PIC16CE62X
The user will note that address 2007h is beyond
the user program memory space. In fact, it belongs
to the special test/configuration memory space
(2000h – 3FFFh), which can be accessed only during
programming.
10.1
Configuration Bits
The configuration bits can be programmed (read as '0')
or left unprogrammed (read as '1') to select various
device configurations. These bits are mapped in
program memory location 2007h.
FIGURE 10-1: CONFIGURATION WORD
(2)
(2)
CP1 CP0
(2)
CP1 CP0
(1)
BODE
(2)
CP1 CP0
(1)
PWRTE
CP1 CP0
bit13
—
WDTE F0SC1 F0SC0
bit0
CONFIG
REGISTER: 2007h
Address
(2)
bit 13-8 CP1:CP0 Pairs: Code protection bits
5-4: Code protection for 2K program memory
11= Program memory code protection off
10= 0400h-07FFh code protected
01= 0200h-07FFh code protected
00= 0000h-07FFh code protected
Code protection for 1K program memory
11= Program memory code protection off
10=Program memory code protection on
01= 0200h-03FFh code protected
00= 0000h-03FFh code protected
Code protection for 0.5K program memory
11= Program memory code protection off
10= Program memory code protection of
01= Program memory code protection of
00= 0000h-01FFh code protected
bit 7:
bit 6:
Unimplemented: Read as '1'
(1)
BODEN: Brown-out Reset Enable bit
1 = BOR enabled
0 = BOR disabled
(1)
bit 3:
bit 2:
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
bit 1-0: FOSC1:FOSC0: Oscillator Selection bits
11= RC oscillator
10= HS oscillator
01= XT oscillator
00= LP oscillator
Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT) regardless of the value of bit PWRTE. Ensure
the Power-up Timer is enabled anytime Brown-out Reset is enabled.
2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.
DS40182A-page 50
Preliminary
1998 Microchip Technology Inc.