PIC16F87XA
FIGURE 4-9:
PORTE BLOCK DIAGRAM
(IN I/O PORT MODE)
4.5
PORTE and TRISE Register
Note: PORTE and TRISE are not implemented
I/O pin(1)
on the 28-pin devices.
Data
Bus
Data Latch
D
Q
PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6,
and RE2/CS/AN7), which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
WR
Port
CK
TRIS Latch
The PORTE pins become the I/O control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is
set. In this mode, the user must make certain that the
TRISE<2:0> bits are set, and that the pins are configured
as digital inputs. Also ensure that ADCON1 is configured
for digital I/O. In this mode, the input buffers are TTL.
D
Q
WR
TRIS
Schmitt
Trigger
Input
CK
Buffer
RD
TRIS
Register 4-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. When
Q
D
selected for analog input, these pins will read as ’0’s.
EN
EN
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
RD Port
Note 1: I/O pins have protection diodes to VDD and VSS.
Note: On a Power-on Reset, these pins are con-
figured as analog inputs, and read as ‘0’.
TABLE 4-9:
Name
PORTE FUNCTIONS
Bit# Buffer Type
Function
I/O port pin or read control input in Parallel Slave Port mode or analog input:
RD
1 = Idle
RE0/RD/AN5
bit0
ST/TTL(1)
0 = Read operation. Contents of PORTD register are output to PORTD
I/O pins (if chip selected).
I/O port pin or write control input in Parallel Slave Port mode or analog input:
WR
1= Idle
RE1/WR/AN6 bit1
ST/TTL(1)
ST/TTL(1)
0= Write operation. Value of PORTD I/O pins is latched into PORTD
register (if chip selected).
I/O port pin or chip select control input in Parallel Slave Port mode or analog input:
CS
RE2/CS/AN7
bit2
1= Device is not selected
0= Device is selected
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 47
MICROCHIP [ MICROCHIP ]
