PIC16F87XA
FIGURE 4-11:
PARALLEL SLAVE PORT WRITE WAVEFORMS
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
FIGURE 4-12:
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
TABLE 4-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
Value on
all other
RESETS
Value on:
POR, BOR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
08h
09h
89h
0Ch
8Ch
9Fh
PORTD
PORTE
TRISE
PIR1
Port Data Latch when written; Port pins when read
xxxx xxxx uuuu uuuu
---- -xxx ---- -uuu
0000 -111 0000 -111
—
IBF
—
—
—
—
—
RE2
RE1
RE0
OBF
ADIF
ADIE
IBOV PSPMODE
PORTE Data Direction Bits
(1)
(1)
PSPIF
PSPIE
RCIF
RCIE
—
TXIF
TXIE
—
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
PCFG3 PCFG2 PCFG1 PCFG0 --0- 0000 --0- 0000
PIE1
ADCON1
ADFM ADCS2
Legend: x= unknown, u= unchanged, -= unimplemented, read as '0'. Shaded cells are not used by the Parallel Slave Port.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F873A/876A; always maintain these bits clear.
DS39582A-page 50
AdvanceInformation
2001 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
