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PIC16LF1947-E/MR 参数 Datasheet PDF下载

PIC16LF1947-E/MR图片预览
型号: PIC16LF1947-E/MR
PDF下载: 下载PDF文件 查看货源
内容描述: [64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology]
分类和应用: 微控制器
文件页数/大小: 440 页 / 4740 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F/LF1946/47  
24.3.2  
AUTO-BAUD OVERFLOW  
24.3.3.1  
Special Considerations  
During the course of automatic baud detection, the  
ABDOVF bit of the BAUDxCON register will be set if the  
baud rate counter overflows before the fifth rising edge  
is detected on the RX pin. The ABDOVF bit indicates  
that the counter has exceeded the maximum count that  
can fit in the 16 bits of the SPxBRGH:SPxBRGL  
register pair. After the ABDOVF has been set, the coun-  
ter continues to count until the fifth rising edge is  
detected on the RXx/DTx pin. Upon detecting the fifth  
RXx/DTx edge, the hardware will set the RCxIF inter-  
rupt flag and clear the ABDEN bit of the BAUDxCON  
register. The RCxIF flag can be subsequently cleared  
by reading the RCxREG. The ABDOVF flag can be  
cleared by software directly.  
Break Character  
To avoid character errors or character fragments during  
a wake-up event, the wake-up character must be all  
zeros.  
When the wake-up is enabled the function works  
independent of the low time on the data stream. If the  
WUE bit is set and a valid non-zero character is  
received, the low time from the Start bit to the first rising  
edge will be interpreted as the wake-up event. The  
remaining bits in the character will be received as a  
fragmented character and subsequent characters can  
result in framing or overrun errors.  
Therefore, the initial character in the transmission must  
be all ‘0’s. This must be 10 or more bit times, 13-bit  
times recommended for LIN bus, or any number of bit  
times for standard RS-232 devices.  
To terminate the auto-baud process before the RCxIF  
flag is set, clear the ABDEN bit then clear the ABDOVF  
bit. The ABDOVF bit will remain set if the ABDEN bit is  
not cleared first.  
Oscillator Startup Time  
Oscillator start-up time must be considered, especially  
in applications using oscillators with longer start-up  
intervals (i.e., LP, XT or HS/PLL mode). The Sync  
Break (or wake-up signal) character must be of  
sufficient length, and be followed by a sufficient  
interval, to allow enough time for the selected oscillator  
to start and provide proper initialization of the EUSART.  
24.3.3  
AUTO-WAKE-UP ON BREAK  
During Sleep mode, all clocks to the EUSART are  
suspended. Because of this, the Baud Rate Generator  
is inactive and a proper character reception cannot be  
performed. The Auto-Wake-up feature allows the  
controller to wake-up due to activity on the RXx/DTx  
line. This feature is available only in Asynchronous  
mode.  
WUE Bit  
The wake-up event causes a receive interrupt by  
setting the RCxIF bit. The WUE bit is cleared by  
hardware by a rising edge on RXx/DTx. The interrupt  
condition is then cleared by software by reading the  
RCxREG register and discarding its contents.  
The Auto-Wake-up feature is enabled by setting the  
WUE bit of the BAUDxCON register. Once set, the  
normal receive sequence on RXx/DTx is disabled, and  
the EUSART remains in an Idle state, monitoring for a  
wake-up event independent of the CPU mode. A  
wake-up event consists of a high-to-low transition on the  
RXx/DTx line. (This coincides with the start of a Sync  
Break or a wake-up signal character for the LIN  
protocol.)  
To ensure that no actual data is lost, check the RCIDL  
bit to verify that a receive operation is not in process  
before setting the WUE bit. If a receive operation is not  
occurring, the WUE bit may then be set just prior to  
entering the Sleep mode.  
The EUSART module generates an RCxIF interrupt  
coincident with the wake-up event. The interrupt is  
generated synchronously to the Q clocks in normal CPU  
operating modes (Figure 24-7), and asynchronously if  
the device is in Sleep mode (Figure 24-8). The interrupt  
condition is cleared by reading the RCxREG register.  
The WUE bit is automatically cleared by the low-to-high  
transition on the RXx line at the end of the Break. This  
signals to the user that the Break event is over. At this  
point, the EUSART module is in Idle mode waiting to  
receive the next character.  
DS41414A-page 306  
Preliminary  
2010 Microchip Technology Inc.  
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