PIC16F/LF1946/47
TABLE 22-9: SUMMARY OF REGISTERS ASSOCIATED WITH ENHANCED PWM
Register
on Page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(1)
CCPxCON
CCPxAS
CCPTMRS0
CCPTMRS1
INTCON
PIE1
PxM<1:0>
DCxB<1:0>
CCPxM<3:0>
PSSxAC<1:0> PSSxBD<1:0>
C2TSEL<1:0>
229
232
230
231
89
CCPxASE
CCPxAS<2:0>
C4TSEL<1:0>
C3TSEL<1:0>
C1TSEL<1:0>
C5TSEL<1:0>
—
GIE
—
—
—
—
—
PEIE
TMR0IE
RCIE
INTE
IOCIE
SSPIE
BCLIE
TMR6IE
SSPIF
BCLIF
TMR0IF
CCP1IE
LCDIE
—
INTF
IOCIF
TMR1IE
CCP2IE
—
TMR1GIE
OSFIE
—
ADIE
TXIE
TMR2IE
—
90
PIE2
C2IE
C1IE
EEIE
91
PIE3
CCP5IE
ADIF
CCP4IE
RCIF
CCP3IE
TXIF
TMR4IE
TMR2IF
—
92
PIR1
TMR1GIF
OSFIF
—
CCP1IF
LCDIF
—
TMR1IF
CCP2IF
—
94
PIR2
C2IF
C1IF
EEIF
95
PIR3
CCP5IF
CCP4IF
CCP3IF
TMR6IF
TMR4IF
96
PRx
Timer2/4/6 Period Register
203*
234
233
PSTRxCON
PWMxCON
TxCON
—
PxRSEN
—
—
—
STRxSYNC
STRxD
STRxC
STRxB
STRxA
PxDC<6:0>
TxOUTPS<3:0>
TMRxON
TxCKPS<:0>1
205
203
216
216
216
216
216
TMRx
TRISA
TRISB
TRISC
TRISD
TRISE
Timer2/4/6 Module Register
TRISA7
TRISB7
TRISC7
TRISD7
—
TRISA6
TRISB6
TRISC6
TRISD6
—
TRISA5
TRISA4
TRISB4
TRISC4
TRISD4
—
TRISA3
TRISB3
TRISC3
TRISD3
TRISE3
TRISA2
TRISB2
TRISC2
TRISD2
TRISE2
TRISA1
TRISB1
TRISC1
TRISD1
TRISE1
TRISA0
TRISB0
TRISC0
TRISD0
TRISE0
TRISB5
TRISC5
TRISD5
—
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
Note 1: Applies to ECCP modules only.
*
Page provides register information.
DS41414A-page 228
Preliminary
2010 Microchip Technology Inc.