PIC16F/LF1946/47
TABLE 20-5: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1
Register
on Page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CCP1CON
CCP2CON
INTCON
PIE1
P1M<1:0>
P2M<1:0>
GIE
DC1B<1:0>
DC2B<1:0>
CCP1M<3:0>
CCP2M<3:0>
229
229
89
PEIE
ADIE
ADIF
TMR0IE
INTE
TXIE
TXIF
IOCIE
SSPIE
SSPIF
TMR0IF
INTF
IOCIF
TMR1IE
TMR1IF
TMR1GIE
TMR1GIF
RCIE
RCIF
CCP1IE
CCP1IF
TMR2IE
TMR2IF
90
PIR1
94
TMR1H
TMR1L
TRISB
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
195*
195*
127
130
199
200
TRISB7
TRISC7
TRISB6
TRISC6
TRISB5
TRISC5
TRISB4
TRISC4
TRISB3
TRISC3
TRISB2
TRISC2
T1SYNC
T1GVAL
TRISB1
TRISC1
—
TRISB0
TRISC0
TMR1ON
TRISC
T1CON
T1GCON
TMR1CS<1:0>
T1CKPS<1:0>
T1OSCEN
TMR1GE
T1GPOL
T1GTM
T1GSPM
T1GGO/
DONE
T1GSS<1:0>
Legend:
— = unimplemented location, read as ‘0’. Shaded cells are not used by the Timer1 module.
*
Page provides register information.
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 201