PIC16C63A/65B/73B/74B
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the FOSC/(16(X + 1)) equation can reduce the
baud rate error in some cases.
11.1 USART Baud Rate Generator
(BRG)
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In Asynchronous
mode, bit BRGH (TXSTA<2>) also controls the baud
rate. In Synchronous mode, bit BRGH is ignored.
Table 11-1 shows the formula for computation of the
baud rate for different USART modes, which only apply
in Master mode (internal clock).
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
11.1.1
SAMPLING
The data on the RC7/RX/DT pin is sampled three times
near the center of each bit time by a majority detect cir-
cuit to determine if a high or a low level is present at the
RX pin.
Given the desired baud rate and Fosc, the nearest inte-
ger value for the SPBRG register can be calculated
using the formula in Table 11-1. From this, the error in
baud rate can be determined.
TABLE 11-1: BAUD RATE FORMULA
SYNC
BRGH = 0 (Low Speed)
BRGH = 1 (High Speed)
0
1
(Asynchronous) Baud Rate = FOSC/(64(SPBRG+1))
(Synchronous) Baud Rate = FOSC/(4(SPBRG+1))
Baud Rate = FOSC/(16(SPBRG+1))
N/A
TABLE 11-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Value on:
POR,
BOR
Value on
all other
RESETS
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
98h
18h
99h
TXSTA
RCSTA
CSRC
SPEN
TX9
RX9
TXEN SYNC
SREN CREN
—
—
BRGH
FERR
TRMT TX9D 0000 -010
OERR RX9D 0000 -00x
0000 0000
0000 -010
0000 -00x
0000 0000
SPBRG Baud Rate Generator register
Legend: x= unknown, - = unimplemented, read as '0'. Shaded cells are not used by the BRG.
2000 Microchip Technology Inc.
DS30605C-page 67
MICROCHIP [ MICROCHIP ]
