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PIC16C62B-04/SO 参数 Datasheet PDF下载

PIC16C62B-04/SO图片预览
型号: PIC16C62B-04/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28引脚8位CMOS微控制器 [28-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器外围集成电路光电二极管PC可编程只读存储器时钟
文件页数/大小: 120 页 / 1994 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16C62B/72A  
Table 10-5 shows the reset conditions for the STATUS,  
PCON and PC registers, while Table 10-6 shows the  
reset conditions for all the registers.  
10.8  
Time-out Sequence  
When a POR reset occurs, the PWRT delay starts (if  
enabled). When PWRT ends, the OST counts 1024  
oscillator cycles (LP, XT, HS modes only). When OST  
completes, the device comes out of reset. The total  
time-out will vary based on oscillator configuration and  
the status of the PWRT. For example, in RC mode with  
the PWRT disabled, there will be no time-out at all.  
10.9  
Power Control/Status Register  
(PCON)  
The BOR bit is unknown on Power-on Reset. If the  
Brown-out Reset circuit is used, the BOR bit must be  
set by the user and checked on subsequent resets to  
see if it was cleared, indicating a Brown-out has  
occurred.  
If MCLR is kept low long enough, the time-outs will  
expire. Bringing MCLR high will begin execution imme-  
diately. This is useful for testing purposes or to synchro-  
nize more than one PIC16CXXX device operating in  
parallel.  
POR (Power-on Reset Status bit) is cleared on a  
Power-on Reset and unaffected otherwise. The user  
Status Register  
IRP  
RP1  
RP0  
TO  
PD  
Z
DC  
C
PCON Register  
POR  
BOR  
TABLE 10-3  
TIME-OUT IN VARIOUS SITUATIONS  
Power-up  
Wake-up from  
SLEEP  
Oscillator Configuration  
Brown-out  
PWRTE = 0  
72 ms + 1024TOSC  
72 ms  
PWRTE = 1  
1024TOSC  
XT, HS, LP  
RC  
72 ms + 1024TOSC  
1024TOSC  
72 ms  
TABLE 10-4  
STATUS BITS AND THEIR SIGNIFICANCE  
POR  
BOR  
TO  
PD  
0
0
0
1
1
1
1
1
x
x
x
0
1
1
1
1
1
0
x
1
0
0
u
1
1
x
0
1
1
0
u
0
Power-on Reset  
Illegal, TO is set on POR  
Illegal, PD is set on POR  
Brown-out Reset  
WDT Reset  
WDT Wake-up  
MCLR Reset during normal operation  
MCLR Reset during SLEEP or interrupt wake-up from SLEEP  
TABLE 10-5  
RESET CONDITION FOR SPECIAL REGISTERS  
Program  
Counter  
STATUS  
Register  
PCON  
Register  
Condition  
Power-on Reset  
000h  
000h  
0001 1xxx  
000u uuuu  
0001 0uuu  
0000 1uuu  
uuu0 0uuu  
0001 1uuu  
uuu1 0uuu  
---- --0x  
---- --uu  
---- --uu  
---- --uu  
---- --uu  
---- --u0  
---- --uu  
MCLR Reset during normal operation  
MCLR Reset during SLEEP  
WDT Reset  
000h  
000h  
WDT Wake-up  
PC + 1  
000h  
Brown-out Reset  
Interrupt wake-up from SLEEP  
PC + 1(1)  
Legend: u= unchanged, x= unknown, -= unimplemented bit read as '0'.  
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).  
DS35008B-page 60  
Preliminary  
1999 Microchip Technology Inc.