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PIC16C62B-04/SO 参数 Datasheet PDF下载

PIC16C62B-04/SO图片预览
型号: PIC16C62B-04/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28引脚8位CMOS微控制器 [28-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器外围集成电路光电二极管PC可编程只读存储器时钟
文件页数/大小: 120 页 / 1994 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16C62B/72A  
10.2.3 RC OSCILLATOR  
10.3  
Reset  
For timing insensitive applications, the “RC” device  
option offers additional cost savings. The RC oscillator  
frequency is a function of the supply voltage, the resis-  
tor (REXT) and capacitor (CEXT) values, and the operat-  
ing temperature. In addition to this, the oscillator  
frequency will vary from unit to unit due to normal pro-  
cess parameter variation. Furthermore, the difference  
in lead frame capacitance between package types will  
also affect the oscillation frequency, especially for low  
CEXT values. The user also needs to take into account  
variation due to tolerance of external R and C compo-  
nents used. Figure 10-4 shows how the R/C combina-  
tion is connected to the PIC16CXXX.  
The PIC16CXXX differentiates between various kinds  
of reset:  
• Power-on Reset (POR)  
• MCLR reset during normal operation  
• MCLR reset during SLEEP  
• WDT Reset (during normal operation)  
• WDT Wake-up (during SLEEP)  
• Brown-out Reset (BOR)  
Some registers are not affected in any reset condition;  
their status is unknown on POR and unchanged by any  
other reset. Most other registers are reset to a “reset  
state” on Power-on Reset (POR), on the MCLR and  
WDT Reset, on MCLR reset during SLEEP, and on  
Brown-out Reset (BOR). They are not affected by a  
WDT Wake-up from SLEEP, which is viewed as the  
resumption of normal operation. The TO and PD bits  
are set or cleared depending on the reset situation, as  
indicated in Table 10-4. These bits are used in software  
to determine the nature of the reset. See Table 10-6 for  
a full description of reset states of all registers.  
FIGURE 10-4: RC OSCILLATOR MODE  
VDD  
Rext  
Internal  
OSC1  
clock  
Cext  
VSS  
PIC16CXX  
A simplified block diagram of the on-chip reset circuit is  
shown in Figure 10-5.  
OSC2/CLKOUT  
Fosc/4  
The PICmicro devices have a MCLR noise filter in the  
MCLR reset path. The filter will ignore small pulses.  
However, a valid MCLR pulse must meet the minimum  
pulse width (TmcL, Specification #30).  
Recommended values: 3 kΩ ≤ Rext 100 kΩ  
Cext > 20pF  
No internal reset source (WDT, BOR, POR) willdrive  
the MCLR pin low.  
1999 Microchip Technology Inc.  
Preliminary  
DS35008B-page 57