PIC16C62B/72A
GO/DONE bit will be set, starting the A/D conversion,
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
with minimal software overhead. The appropriate ana-
log input channel must be selected and the minimum
acquisition time must pass before the “special event
trigger” sets the GO/DONE bit (starts a conversion).
9.4
A/D Conversions
Note: The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
9.5
Use of the CCP Trigger
An A/D conversion can be started by the “special event
trigger” of the CCP1 module. This requires that the
CCP1M3:CCP1M0 bits (CCP1CON<3:0>) be pro-
grammed as 1011and that the A/D module be enabled
(ADON bit is set). When the trigger occurs, the
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter.
TABLE 9-2
SUMMARY OF A/D REGISTERS
Value on
POR,
BOR
Value on all
other Resets
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE
PEIE
ADIF
ADIE
T0IE
—
INTE
—
RBIE
SSPIF
SSPIE
T0IF
INTF
RBIF
0000 000x 0000 000u
0Bh,8Bh
0Ch
8Ch
1Eh
PIR1
CCP1IF
TMR2IF TMR1IF -0-- 0000 -0-- 0000
—
—
PIE1
—
—
CCP1IE TMR2IE TMR1IE -0-- 0000 -0-- 0000
ADRES
A/D Result Register
xxxx xxxx uuuu uuuu
ADCON0 ADCS1 ADCS0 CHS2
CHS1
—
CHS0 GO/DONE
—
ADON 0000 00-0 0000 00-0
1Fh
ADCON1
—
—
—
—
PCFG2
RA2
PCFG1 PCFG0 ---- -000 ---- -000
9Fh
--0x 0000 --0u 0000
--11 1111 --11 1111
05h
PORTA
TRISA
—
—
—
—
RA5
RA4
RA3
RA1
RA0
85h
PORTA Data Direction Register
Legend: x= unknown, u= unchanged, -= unimplemented read as '0'. Shaded cells are not used for A/D conversion.
DS35008B-page 54
Preliminary
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
