PIC12F635/PIC16F636/639
REGISTER 12-2: WDTCON: WATCHDOG TIMER CONTROL REGISTER
U-0
—
U-0
—
U-0
—
R/W-0
R/W-1
R/W-0
R/W-0
R/W-0
SWDTEN(1)
bit 0
WDTPS3
WDTPS2
WDTPS1
WDTPS0
bit 7
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-5
bit 4-1
Unimplemented: Read as ‘0’
WDTPS<3:0>: Watchdog Timer Period Select bits
Bit Value = Prescale Rate
0000 = 1:32
0001 = 1:64
0010 = 1:128
0011 = 1:256
0100 = 1:512 (Reset value)
0101 = 1:1024
0110 = 1:2048
0111 = 1:4096
1000 = 1:8192
1001 = 1:16384
1010 = 1:32768
1011 = 1:65536
1100 = Reserved
1101 = Reserved
1110 = Reserved
1111 = Reserved
bit 0
SWDTEN: Software Enable or Disable the Watchdog Timer bit(1)
1= WDT is turned on
0= WDT is turned off (Reset value)
Note 1: If WDTE Configuration bit = 1, then WDT is always enabled, irrespective of this control bit. If WDTE
Configuration bit = 0, then it is possible to turn WDT on/off with this control bit.
TABLE 12-8: SUMMARY OF REGISTERS ASSOCIATED WITH WATCHDOG TIMER
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WDTCON
—
—
INTEDG
CP
—
WDTPS3 WDTPS2 WSTPS1 WDTPS0 SWDTEN
---0 1000
1111 1111
—
---0 1000
1111 1111
—
OPTION_REG
CONFIG
RAPU
CPD
T0CS
MCLRE
T0SE
PSA
PS2
PS1
PS0
PWRTE
WDTE
FOSC2
FOSC1
FOSC0
Legend:
Note 1:
Shaded cells are not used by the Watchdog Timer.
See Register 12-1 for operation of all Configuration Word register bits.
DS41232D-page 144
© 2007 Microchip Technology Inc.