PIC12C5XX
FIGURE 8-8: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Power-Up
Detect
Pin Change
SLEEP
POR (Power-On Reset)
VDD
Wake-up on
pin change
GP3/MCLR/VPP
WDT Time-out
MCLRE
RESET
S
R
Q
Q
8-bit Asynch
On-Chip
DRT OSC
Ripple Counter
(Start-Up Timer)
CHIP RESET
FIGURE 8-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR PULLED LOW)
VDD
MCLR
INTERNAL POR
TDRT
DRT TIME-OUT
INTERNAL RESET
FIGURE 8-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD): FAST VDD RISE TIME
VDD
MCLR
INTERNAL POR
TDRT
DRT TIME-OUT
INTERNAL RESET
1999 Microchip Technology Inc.
DS40139E-page 41